Principal FPGA/ASIC Verification Engineer (Secret Clearance)

RTX (Raytheon); El Segundo (CA); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Three weeks vacation

401(k) with employer matching

Tuition reimbursement program

Student Loan Repayment Program

Life insurance

Disability coverage

Relocation assistance

Job summary

RTX is seeking an experienced Principal Electrical or Computer engineer to join the Microelectronics Technology team in El Segundo. The role focuses on testbench design, verification of high-performance ASICs and FPGAs for signal processing and information assurance.

You will work on SystemVerilog/UVM test environments, contribute to test plans, and lead verification efforts with a strong emphasis on delivery against aggressive schedules.

Qualifications

• RTL coding and simulation in VHDL or Verilog.
• Testbench development for the verification of RTL blocks using VHDL and/or SystemVerilog.
• Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog).
• Familiarity with revision control concepts and tools (e.g. Git, Subversion).
• Ability to work with minimal supervision as a part of a team of engineers with a variety of skills and backgrounds while being matrixed into projects with aggressive schedules and frequent milestones.
• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 8 years prior relevant experience or an Advanced Degree in a related field and minimum 5 years of experience.
• Active and transferable U.S. government issued security clearance is required prior to start date.
• U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.

Responsibilities

• Verification environment architecture and design using SystemVerilog with UVM/UVM-F.
• Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking.
• Testbench development for the verification of RTL blocks using VHDL or SystemVerilog.
• Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow.
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status.

Skills

RTL coding

VHDL

Verilog

SystemVerilog

Testbench development

Constrained random

Functional coverage

Git

Subversion

C/C++

Unix scripting

Education

STEM degree (B.S./B.E.)

Advanced degree in related field

Tools

Questasim

Synplify

Quartus

Vivado

Job description

RTX is seeking an experienced Principal Electrical or Computer engineer to join the Microelectronics Technology team in El Segundo. The role focuses on testbench design, verification of high-performance ASICs and FPGAs for signal processing and information assurance.

You will work on SystemVerilog/UVM test environments, contribute to test plans, and lead verification efforts with a strong emphasis on delivery against aggressive schedules.