Lead FPGA/ASIC Engineer, Space Systems

Northrop Grumman

Gilbert (AZ)

Sur place

USD 98 000 - 148 000

Plein temps

14 jours+
Générateur de candidature

Transformez ce poste en entretien — un CV et une lettre de motivation conçus selon ce que cet employeur recherche.

Passez les filtres ATS

Avantages offerts par ce poste

Health insurance
Life and disability insurance
Savings plan
Paid holidays and PTO

Résumé du poste

Northrop Grumman in Gilbert, AZ is seeking a FPGA/ASIC Engineer - Level 3 to join our Space Systems Sector team. You will conduct research, requirements analysis and design, coding, test bench design, verification, synthesis and place & route for our C&DH products, specializing in FPGA/ASIC for space applications.

Responsibilities include HDL design for FPGA/ASIC, verification via simulation and lab testing, synthesis, timing analysis and place & route; experience with space environments

Qualifications

  • Bachelor’s degree in STEM with 5+ years in FPGA/ASIC design or Master’s with 3+ years
  • Experience in RTL design for aerospace/space applications
  • Proficient in FPGA design flow: RTL/gate, synthesis, P&R, STA, power analysis
  • Industry experience in FPGA Design, Simulation and V&V

Responsabilités

  • HDL design for FPGA/ASIC applications
  • FPGA/ASIC verification via simulation and emulation
  • FPGA/ASIC synthesis, timing analysis, and place & route
  • Design for space environments or space applications

Connaissances

RTL design
FPGA design
V&V
HDL

Formation

Bachelor's degree in STEM
Advanced degree preferred

Outils

Xilinx ISE/Vivado
ModelSim/QuestaSim
Synplify

Description du poste

Northrop Grumman in Gilbert, AZ is seeking a FPGA/ASIC Engineer - Level 3 to join our Space Systems Sector team. You will conduct research, requirements analysis and design, coding, test bench design, verification, synthesis and place & route for our C&DH products, specializing in FPGA/ASIC for space applications.

Responsibilities include HDL design for FPGA/ASIC, verification via simulation and lab testing, synthesis, timing analysis and place & route; experience with space environments

Obtenez votre examen gratuit et confidentiel de votre CV.

ou faites glisser et déposez votre fichier ici.

Similar jobs

Postes similaires à comparer

Principal Engineer Electrical
Principal Engineer Electrical

Northrop Grumman • Gilbert (AZ)

Sur place
USD 98 000 - 148 000
Health insurance
Life and disability insurance
Savings plan
+1
Lead Spaceflight Electrical Engineer
Lead Spaceflight Electrical Engineer

Northrop Grumman • Gilbert (AZ)

Sur place
USD 98 000 - 148 000
Health insurance
Paid time off
Discretionary bonus
Principal FPGA Engineer — Secret Clearance, Space Systems
Principal FPGA Engineer — Secret Clearance, Space Systems

Northrop Grumman • Chandler (AZ)

Sur place
USD 108 000 - 162 000
Relocation assistance
Senior FPGA Design Engineer (Secret Clearance)
Senior FPGA Design Engineer (Secret Clearance)

0902 SP - Launch Vehicles • États-Unis

Sur place
USD 108 200 - 162 400
Health insurance
Life insurance
Disability insurance
+2
Senior FPGA Digital Engineer (Secret Clearance)
Senior FPGA Digital Engineer (Secret Clearance)

Northrop Grumman Corp. • Chandler (AZ)

Sur place
USD 108 000 - 162 000
Relocation assistance
Secret clearance
Travel opportunities
FPGA Digital Engineer (Entry-Level) with Secret Clearance
FPGA Digital Engineer (Entry-Level) with Secret Clearance

Northrop Grumman • Chandler (AZ)

Sur place
USD 87 000 - 131 000
Health insurance
Life and disability insurance
Savings plan
+2
Space FPGA/ASIC Engineer — SCI Clearance
Space FPGA/ASIC Engineer — SCI Clearance

Northrop Grumman • Virginia (MN)

Sur place
USD 114 000 - 171 000
Health insurance
Life and disability insurance
Paid time off
FPGA Design Engineer – Early‑Career (Secret Clearance)
FPGA Design Engineer – Early‑Career (Secret Clearance)

Northrop Grumman Corp. • Chandler (AZ)

Sur place
USD 87 000 - 131 000
Relocation assistance
Travel 10%
Senior Space FPGA Engineer — Lead High-Speed Design
Senior Space FPGA Engineer — Lead High-Speed Design

Cesiumastro • El Segundo (CA)

Sur place
USD 193 000 - 236 000
Stock options
Health benefits
Retirement plans
Senior Space FPGA/ASIC Design Engineer
Senior Space FPGA/ASIC Design Engineer

The Aerospace Corporation • États-Unis

Sur place
USD 129 000 - 194 000
Comprehensive health care and wellness
401(k) with company match
Relocation assistance
+3