Engineering Intern - Neural Network Hardware Design

Rivian; Palo Alto (CA); On-site; USD 62,000 - 70,000; Full time

Job summary

Rivian is seeking an Engineering Intern to work on our Neural Network Engine hardware design. This onsite, full-time internship for Spring Co‑op 2027 requires active enrollment and is open to undergraduate or graduate students with eligibility verified by Rivian's program.

Interns will design synthesizable RTL for NNE blocks, integrate with modules, model and analyze performance, and evaluate power and timing while gaining exposure to ML hardware/software within Rivian's innovative automotive

Qualifications

• Must be pursuing a bachelor's, master's, or PhD in Electrical or Computer Engineering.
• Active enrollment in accredited program during internship term.
• Experience with SystemVerilog RTL design and EDA tools.
• Python coding experience.
• Exposure to ML hardware/software is a plus.

Responsibilities

• Design synthesizable RTL for NNE blocks and interfaces.
• Integrate with other modules.
• Model and analyze performance.
• Evaluate power and timing results.
• Verify intended functionality.

Skills

SystemVerilog RTL design

Python

CPUs/GPUs design

Machine Learning HW/SW exposure

Education

Pursuing Bachelor's/Master's/PhD in Electrical or Computer Engineering

Tools

eCAD tools

Job description

Rivian is seeking an Engineering Intern to work on our Neural Network Engine hardware design. This onsite, full-time internship for Spring Co‑op 2027 requires active enrollment and is open to undergraduate or graduate students with eligibility verified by Rivian's program.

Interns will design synthesizable RTL for NNE blocks, integrate with modules, model and analyze performance, and evaluate power and timing while gaining exposure to ML hardware/software within Rivian's innovative automotive