Neural Engine Verification Intern: Design & AI Tools

Rivian; Palo Alto (CA); On-site; USD 62,000 - 70,000; Full time

Benefits offered by this job

Paid vacation

Medical insurance

Job summary

Rivian invites student interns to join our Silicon/AI tooling team in Palo Alto, focusing on neural engine silicon development, RTL automation, and performance modeling. You will build C++/SystemC models, develop ASIC verification collateral, and implement latency analysis for on-chip interconnects.

Ideal candidates are pursuing degrees in Electrical or Computer Engineering and have knowledge of C/Python and SystemVerilog.

Qualifications

• Must be currently pursuing a bachelors, masters, or PhD degree at an accredited university
• Actively pursuing a degree or one closely related in Electrical or Computer Engineering
• Fundamentals of Computer architecture
• CPU and Memory hierarchy
• C/Python coding skills
• System verilog language

Responsibilities

• Experiment with AI tools for Silicon development: Leverage LLMs and generative agents to automate RTL generation, code documentation, and bug localization within the DLA (Deep Learning Accelerator) pipeline
• Understand system architecture and develop tools for performance modeling and testing: Build bit-accurate C++/SystemC models to validate the throughput of neural network layers against golden ML frameworks like PyTorch
• Develop tools and verification collateral for large-scale ASIC development: Create scalable UVM-based testbench components and automated regression scripts to support high-complexity SoC integration
• Interconnect & Latency Analysis: Architect and implement performance monitors for Interconnect/AXI interfaces to analyze how on chip network impacts real-time inference latency
• Safety-Aware Verification & Fault Injection: Design automated verification collateral to simulate hardware-level faults, ensuring that safety mechanisms correctly detect errors according to ISO 26262 automotive standards

Skills

Fundamentals of Computer architecture

CPU and Memory hierarchy

C/Python coding skills

System verilog language

Education

Bachelor/Master/PhD student

Electrical or Computer Engineering focus

Job description

Rivian invites student interns to join our Silicon/AI tooling team in Palo Alto, focusing on neural engine silicon development, RTL automation, and performance modeling. You will build C++/SystemC models, develop ASIC verification collateral, and implement latency analysis for on-chip interconnects.

Ideal candidates are pursuing degrees in Electrical or Computer Engineering and have knowledge of C/Python and SystemVerilog.