Emulation Platform Lead: End-to-End ASIC Validation

engineeringjobs.net, Inc.; United States; On-site; USD 150,000 - 230,000; Full time

Job summary

Anthriq is seeking an engineer to own the Cadence Palladium emulation platform end to end, from install through first-silicon bring-up. You will define the RTL-to-emulation readiness, build a scalable workflow, and enable firmware and software teams to run realistic workloads pre-silicon.

As the first emulation hire, you will set the standards, lead model memory validation, and coordinate with design, verification, firmware, and software teams to maximize utilization of the platform in a

Qualifications

• Hands-on with emulation platforms (Cadence Palladium, Synopsys ZeBu, or Siemens Veloce)
• Defined emulation flow from RTL to first silicon bring-up
• Able to bench-out hardware/software co-verification and pre-silicon workloads
• Experience bringing up emulation platforms from near-zero
• Strong scripting in Python and TCL for build and regression automation

Responsibilities

• Drive installation to first successful full-chip compile
• Own end-to-end compile flow: partitioning, capacity, turnaround, incremental compile
• Own capacity planning and platform roadmap
• Define emulation-readiness standards for RTL and ensure RTL is emulation-clean
• Work with design team to ensure RTL arrives emulation-ready
• Bring up in-circuit targets with real hardware and debug
• Develop firmware boot workflows on the emulator for software teams
• Model and validate memory subsystem under realistic traffic
• Run emulation as an internal service and optimize utilization
• Build regression, automation, and triage infrastructure
• Own gate-level and power-aware emulation ahead of tapeout

Skills

RTL literacy

SystemVerilog

Verilog

Python

TCL

Debugging at scale

Hardware/software co-verification

Build regression automation

Team leadership

Tools

Cadence Palladium

Synopsys ZeBu

Siemens Veloce

Job description

Anthriq is seeking an engineer to own the Cadence Palladium emulation platform end to end, from install through first-silicon bring-up. You will define the RTL-to-emulation readiness, build a scalable workflow, and enable firmware and software teams to run realistic workloads pre-silicon.

As the first emulation hire, you will set the standards, lead model memory validation, and coordinate with design, verification, firmware, and software teams to maximize utilization of the platform in a