Applications Engineer - Emulation & Verification

Synopsys; Mountain View (CA); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Health benefits

Equity

Annual bonus

Job summary

Synopsys is seeking an experienced engineer to support and optimize emulation platforms for leading-edge ASIC/SoC verification. You will work with customer teams to resolve complex bring-up issues, improve performance, and demonstrate how emulation fits into verification strategies.

You will collaborate across global teams, contribute to technical content, and stay ahead in verification methodologies to help customers tape out on schedule.

Qualifications

• 6-10 years of hands-on IC design, verification, emulation, or FPGA prototyping; track record supporting real ASIC or SoC verification projects.
• Deep understanding of verification methodologies including simulation, emulation, and prototyping in a complete strategy.
• Proficiency with Verilog and VHDL; strong SystemVerilog for testbenches and assertion-based verification.
• Working knowledge of C/C++.
• Experience with Palladium, Zebu, or Veloce is highly valued; hands-on FPGA prototyping or virtual platforms.
• Excellent communication and ability to work across global teams and customer-facing situations.

Responsibilities

• Deploy and configure Synopsys emulation platforms (ZeBu) for customer ASIC/SoC verification environments, leading bring-up and optimization.
• Troubleshoot complex issues across hardware emulation, FPGA prototyping, and virtual platforms spanning RTL design to software stacks.
• Lead pre-sales technical evaluations and proof-of-concept engagements to demonstrate emulation capabilities on customer designs.
• Collaborate with customer engineering teams to resolve design-specific challenges and integration issues with tool flows.
• Work with sales, marketing, and R&D to surface customer requirements and provide field feedback for product priorities.
• Develop technical content such as application notes, reference designs, setup guides, and best practices for adoption at scale.
• Stay current on verification methodologies and build deep expertise to be a trusted technical resource.

Skills

IC design

Verification

Emulation

FPGA prototyping

Verilog

VHDL

SystemVerilog

C/C++

Customer engagement

Troubleshooting

Tools

Palladium

Zebu

Veloce

FPGA virtual platforms

Job description

Synopsys is seeking an experienced engineer to support and optimize emulation platforms for leading-edge ASIC/SoC verification. You will work with customer teams to resolve complex bring-up issues, improve performance, and demonstrate how emulation fits into verification strategies.

You will collaborate across global teams, contribute to technical content, and stay ahead in verification methodologies to help customers tape out on schedule.