Edge SoC Design Intern: Hands-on PPA & Subsystem Dev

quadric; Burlingame (CA); On-site; USD 69,000 - 79,000; Part time

Benefits offered by this job

Catered lunch

Downtown Burlingame office

Innovative disruption culture

Job summary

Quadric in Burlingame, CA offers a hands-on SoC internship focused on subsystem development, third-party IP integration, and PPA optimization. You will gain exposure to front-end design methodologies and work closely with the hardware team to define integration requirements.

Ideal candidates are pursuing a Bachelor’s, Master’s, or PhD in Electrical or Computer Engineering, familiar with SoC front-end concepts, and proficient in SystemVerilog or Verilog, with strong problem-solving and

Qualifications

• Currently pursuing a Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.
• Familiarity with SoC/ASIC front-end design concepts.
• Proficient in SystemVerilog or Verilog.
• Prepared to collaborate with architects and designers on subsystem development and integration tasks.
• Demonstrated capability in problem-solving, debugging, and clear technical communication.

Responsibilities

• Support SoC Subsystem Development: design and integration of SoC-level subsystems with third-party IP.
• Assist in PPA optimization and front-end timing closure.
• Collaborate with SoC architects and designers to understand design intent and integration requirements.

Skills

SystemVerilog/Verilog

SoC front-end design concepts

Problem-solving and communication

Python scripting

Education

Bachelor's/Master's/PhD in Electrical Engineering or Computer Engineering

Job description

Quadric in Burlingame, CA offers a hands-on SoC internship focused on subsystem development, third-party IP integration, and PPA optimization. You will gain exposure to front-end design methodologies and work closely with the hardware team to define integration requirements.

Ideal candidates are pursuing a Bachelor’s, Master’s, or PhD in Electrical or Computer Engineering, familiar with SoC front-end concepts, and proficient in SystemVerilog or Verilog, with strong problem-solving and