DRAM Front-End Process Integration Engineer

Micron Technology, Inc.; Boise (ID); Hybrid; USD 110,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, vision plans

Paid time off

Career development opportunities

Job summary

Micron Technology, Inc. in Boise, Idaho is seeking a DRAM Device & Process Integration Engineer to drive front-end FEOL integration for next‑generation memory nodes, own integration schemes, DOEs, and learning from development through transfer to manufacturing.

You will work with Process Development, Device Engineering, Yield, and Manufacturing teams; apply device modeling (TCAD/Silvaco/Sentaurus) to guide experiments; analyze inline and yield data; and define milestones to ensure successful

Qualifications

• PhD or MS in Electrical Engineering, Physics, or Materials Science.
• Experience in semiconductor process integration and module ownership.
• Hands-on modeling experience with TCAD, Silvaco, or Sentaurus.
• Ability to correlate simulation results with experimental/silicon data.
• Strong data analysis and DOE skills.
• Excellent communication and cross-functional collaboration.

Responsibilities

• Own process integration for DRAM FEOL modules: define schemes, drive unit interactions, and hit milestones.
• Design and execute DOEs on silicon, analyze data, drive root-cause and resolution.
• Apply device/process modeling to evaluate interactions and scaling options.
• Correlate simulation with experimental data to improve model accuracy.
• Cross-functionally collaborate with PD, Device Eng, Yield, FA, Manufacturing, and Quality teams.
• Define and achieve sub-milestones and support transfer from R&D to manufacturing.

Skills

Process integration

DOE / data analysis

Device physics

Statistical methods

Cross-functional collaboration

Communication

Education

MS or PhD in Electrical Engineering, Physics, or Materials Science

Tools

TCAD

Silvaco

Sentaurus

Job description

Micron Technology, Inc. in Boise, Idaho is seeking a DRAM Device & Process Integration Engineer to drive front-end FEOL integration for next‑generation memory nodes, own integration schemes, DOEs, and learning from development through transfer to manufacturing.

You will work with Process Development, Device Engineering, Yield, and Manufacturing teams; apply device modeling (TCAD/Silvaco/Sentaurus) to guide experiments; analyze inline and yield data; and define milestones to ensure successful