DRAM Device Engineer – Advanced Tech & Yield Leader

Micron Memory Malaysia Sdn Bhd; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid time off and holidays

Competitive benefits package

Job summary

Micron Technology in Boise, Idaho is seeking an Engineer- DRAM to define electrical specs, design experiments, and analyze device performance for next-generation memory technologies. You will build TCAD/compact models, evaluate reliability, and work with cross-functional teams to translate device insights into product improvements.

The role requires a strong background in semiconductor device physics, DRAM/NAND/SRAM knowledge, and hands-on experience with data analysis and DOE.

Qualifications

• MS with 5+ years of industry experience or PhD with hands-on research in Electrical Engineering or related field.
• Strong expertise in semiconductor device physics including CMOS, diodes, and related devices.
• Deep knowledge of mainstream memory technologies such as DRAM, NAND, NOR, or SRAM.
• Experience with DRAM array characterization and failure analysis.
• Proficiency in data analysis, DOE, and statistical techniques using tools such as JMP or Python.

Responsibilities

• Define and drive electrical specifications for DRAM, Advanced DRAM and emerging memory technologies, translating product requirements into device-level targets for performance, reliability and scaling
• Design, implement, and interpret experiments to optimize cell and access device performance. This includes running materials experiment, developing new integration schemes and defining new characterization methodologies
• Develop physical and electrical models (TCAD and compact modeling) to identify performance, yield and reliability limiters, using advanced materials characterization, device physics insight, and statistical data analysis
• Create and or improve stress methodologies to evaluate device reliability (e.g., TDDB, leakage, variability, endurance) and establish robust design margins.
• Analyze array-level behavior using probe, parametric, and backend data to root-cause variability, optimize distributions, and improve yield, quality, and cost
• Collaborate cross-functionally with process integration, design, and product engineering teams to translate device insights into technology and product improvements, enabling best-in-class memory solutions

Skills

Semiconductor device physics

CMOS/diodes

DRAM/NAND/SRAM knowledge

Data analysis/DOE

Python/JMP

Education

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

JMP

Python

Job description

Micron Technology in Boise, Idaho is seeking an Engineer- DRAM to define electrical specs, design experiments, and analyze device performance for next-generation memory technologies. You will build TCAD/compact models, evaluate reliability, and work with cross-functional teams to translate device insights into product improvements.

The role requires a strong background in semiconductor device physics, DRAM/NAND/SRAM knowledge, and hands-on experience with data analysis and DOE.