Senior DRAM Device Engineer: Advanced Cell Tech & Scaling

Micron Technology Inc; Boise (ID); On-site; USD 110,000 - 170,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology Inc. in Boise, Idaho seeks a Device Engineer to define electrical specs and validate future DRAM devices. You will characterize memory arrays, analyze electrical behavior, and influence process decisions impacting yield, quality, and performance.

The role requires MS+5 years or PhD in a related field, with strong semiconductor physics knowledge and experience in DRAM technologies. Collaboration across engineering teams will shape next-generation memory solutions.

Qualifications

• MS with 5+ years of industry experience or PhD with hands-on research in Electrical Engineering, Physics, or related field.
• Strong expertise in semiconductor device physics including CMOS, diodes, and related devices.
• Deep knowledge of memory technologies such as DRAM, NAND, NOR, or SRAM.
• Experience with DRAM array characterization and failure analysis.
• Proficiency in data analysis, DOE, and statistical techniques using JMP or Python.
• Applying AI to engineering problems.

Responsibilities

• Define and drive electrical specifications for DRAM, Advanced DRAM and emerging memory technologies, translating product requirements into device-level targets for performance, reliability and scaling
• Design, implement, and interpret experiments to optimize cell and access device performance. This includes running materials experiment, developing new integration schemes and defining new characterization methodologies
• Develop physical and electrical models (TCAD and compact modeling) to identify performance, yield and reliability limiters, using advanced materials characterization, device physics insight, and statistical data analysis
• Create and or improve stress methodologies to evaluate device reliability (e.g., TDDB, leakage, variability, endurance) and establish robust design margins.
• Analyze array-level behavior using probe, parametric, and backend data to root-cause variability, optimize distributions, and improve yield, quality, and cost
• Collaborate cross-functionally with process integration, design, and product engineering teams to translate device insights into technology and product improvements, enabling best-in-class memory solutions

Skills

Semiconductor device physics

DRAM knowledge

Data analysis

DOE

Python

AI in engineering

Education

MS in Electrical Engineering or Physics

PhD in Electrical Engineering, Physics or related field

Tools

JMP

Python

Job description

Micron Technology Inc. in Boise, Idaho seeks a Device Engineer to define electrical specs and validate future DRAM devices. You will characterize memory arrays, analyze electrical behavior, and influence process decisions impacting yield, quality, and performance.

The role requires MS+5 years or PhD in a related field, with strong semiconductor physics knowledge and experience in DRAM technologies. Collaboration across engineering teams will shape next-generation memory solutions.