DRAM Device Engineer – Advanced Memory & Cell Tech

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 125,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Income protection when unable to work

Paid time off and paid holidays

Paid family leave

Job summary

Micron Technology, Inc. in Boise, Idaho, is seeking a Device Engineer to define and validate future DRAM device and cell technologies.

You will characterize memory arrays, analyze electrical behavior and failures, and influence process decisions that impact yield, quality and performance. This role requires an MS with 5+ years or a PhD, deep semiconductor device physics knowledge, and experience with DRAM, NAND, NOR or SRAM.

Qualifications

• MS with 5+ years of industry experience or PhD with hands-on research in Electrical Engineering, Physics, or related field.
• Strong expertise in semiconductor device physics including CMOS, diodes, and related devices.
• Deep knowledge of mainstream memory technologies such as DRAM, NAND, NOR, or SRAM.
• Experience with DRAM array characterization and failure analysis.
• Proficiency in data analysis, DOE, and statistical techniques using tools such as JMP or Python.

Responsibilities

• Define and drive electrical specifications for DRAM, Advanced DRAM and emerging memory technologies, translating product requirements into device-level targets for performance, reliability and scaling.
• Design, implement, and interpret experiments to optimize cell and access device performance, including running materials experiment, developing new integration schemes and defining new characterization methodologies.
• Develop physical and electrical models (TCAD and compact modeling) to identify performance, yield and reliability limiters, using advanced materials characterization, device physics insight, and statistical data analysis.
• Create and/or improve stress methodologies to evaluate device reliability (TDDB, leakage, variability, endurance) and establish robust design margins.
• Analyze array-level behavior using probe, parametric, and backend data to root-cause variability, optimize distributions, and improve yield, quality, and cost.
• Collaborate cross-functionally with process integration, design, and product engineering teams to translate device insights into technology and product improvements, enabling best-in-class memory solutions.

Skills

Device physics

DRAM memory technology

Data analysis

DOE

Python

JMP

Semiconductor devices

Cross-functional collaboration

Education

MS in Electrical Engineering

PhD in Electrical Engineering or Physics

Tools

JMP

Python

Job description

Micron Technology, Inc. in Boise, Idaho, is seeking a Device Engineer to define and validate future DRAM device and cell technologies.

You will characterize memory arrays, analyze electrical behavior and failures, and influence process decisions that impact yield, quality and performance. This role requires an MS with 5+ years or a PhD, deep semiconductor device physics knowledge, and experience with DRAM, NAND, NOR or SRAM.