Director of Physical Design for 3D-Memory AI SoC

Acceler8 Talent; San Francisco (CA); On-site; USD 350,000 - 550,000; Full time

Job summary

Acceler8 Talent is partnering with a startup designing a cutting-edge 3D-memory-integrated AI accelerator platform to hire an experienced, visionary Director of Physical Design. You will lead full-chip and complex subsystem physical design, driving the PD team from netlist ingestion through GDSII signoff in a fast-paced environment.

You will own floorplanning, CTS, routing, timing closure and DFT/test-mode constraints, collaborate with SoC, Packaging and Foundry teams, and set PD methodologies,

Qualifications

• 15–20 years in ASIC/SoC Physical Design with successful silicon tapeouts.
• Expert PD tools, flows and advanced nodes (3nm/5nm/7nm).
• CTS, timing/congestion-aware routing, SI-aware signoff, low-power/DFT flows.
• NoC/Fabric/AXI interconnect physical implementation; high‑perf on‑chip networks.
• DFT-aware PD; scan chain routing, BIST placement, JTAG/boundary scan constraints.
• Low-power PD; UPF multi‑voltage domains, power gating, retention flop placement.
• Strong leadership, communication, and PM skills in fast-paced environments.
• Proven multiple SoC products from PD through post-silicon qualification.

Responsibilities

• Lead full-chip physical design from netlist to GDSII signoff for complex AI accelerators.
• Own floorplanning, CTS, routing, timing closure and physical verification with Innovus/Genus.
• Drive team planning, external partners, resource allocation and milestone reviews.
• Collaborate with SoC, DFT, Packaging and Foundry for 3D-memory integration and power integrity.
• Develop and review power grid strategies; perform IR drop and EM analysis with Cadence/ANSYS.
• Implement scan chain routing, BIST placement, JTAG and boundary scan constraints.
• Own DRC/LVS/ERC signoff; drive clean tapeouts across all design blocks.

Skills

Leadership

Communication

Project management

Education

B.E./M.S. in Electrical Engineering, VLSI or related

Tools

Innovus

Genus

Cadence Voltus

ANSYS RedHawk

Mentor Calibre

IC Validator

Job description

Acceler8 Talent is partnering with a startup designing a cutting-edge 3D-memory-integrated AI accelerator platform to hire an experienced, visionary Director of Physical Design. You will lead full-chip and complex subsystem physical design, driving the PD team from netlist ingestion through GDSII signoff in a fast-paced environment.

You will own floorplanning, CTS, routing, timing closure and DFT/test-mode constraints, collaborate with SoC, Packaging and Foundry teams, and set PD methodologies,