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Broadcom Inc. in San Jose, CA, is seeking an engineer to drive design from specification through timing closure and hand-off to physical design. You will collaborate with Architecture, Verification, and Physical Design teams to mitigate risks and ensure milestones are met, with strong UVM proficiency expected.
Required BSEE with 5+ years in SoC integration; MSEE or PhD preferred. The role offers a competitive base salary with bonus eligibility and equity potential.
Responsibilities include:
Experience: BSEE required, MSEE/PHD preferred. 5+ years industry experience with a focus on SoC integration, UVM testbench setup and design debug.
The annual base salary range for this position is USD 101,000.00 to USD 162,000.00.
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.