Design Verification Engineer

Broadcom Inc.; San Jose (CA); On-site; USD 143,800 - 230,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

401(k) with company matching

Employee Stock Purchase Program (ESPP)

Paid holidays and sick leave

Job summary

Broadcom Inc. in San Jose, California, is looking for qualified individuals to join their ASIC Product Division. The role involves developing verification environments, analyzing designs, and debugging in a high-performance team. Ideal candidates will have substantial experience in verification methodologies, particularly using SystemVerilog and UVM.

With an annual salary range of $143,800 - $230,000, Broadcom also offers comprehensive benefits including health plans and a 401(k) with matching contributions. Applications are welcome from individuals regardless of background.

Qualifications

• 12+ years of relevant industry work experience.
• Experience verifying designs at system and block level.
• Strong design debugging capabilities.

Responsibilities

• Develop verification environments using SystemVerilog and UVM.
• Design verification components including UVM agents.
• Analyze and debug simulation failures.

Skills

SystemVerilog

UVM

C/C++

Perl

RTL verification methodologies

Education

Bachelor's Degree in Electrical and Electronic Engineering or Computer Science

Job description

The ASIC Product Division in Broadcom, a leading supplier of state‑of‑the‑art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will join a high‑performance design team responsible for state‑of‑the‑art subsystem development to meet customer requirements.

Responsibilities

• Develop verification environments using modern verification techniques such as SystemVerilog and UVM.
• Design verification components including UVM agents and behavioral models.
• Implement coverage and assertions using SystemVerilog.
• Develop random and directed test cases against the specification.
• Analyze and debug simulation failures.
• Analyze coverage results.

Qualifications

• Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent.
• 12+ years of relevant industry work experience.
• Experience verifying designs at system level and block level.
• Fluent knowledge of RTL verification methodologies including SystemVerilog.
• Strong experience with ASIC design verification flows and DV methodologies.
• Strong working knowledge of object‑oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting.
• Strong independent design debugging capability.
• Strong verbal and written communication skills.
• Comfortable working in a team environment with verification and design team members.
• Ability to analyze and resolve complex verification trade‑off scenarios.
• Legal authorization to work in the United States.

Preferred Skills

• Hardware design and debug experience.
• Programming languages such as C++, SystemC.
• Experience with emulators and FPGA‑based prototyping.
• Familiarity with overall chip design methodologies and tools.
• Knowledge of CPU, DDR, bus protocols, network protocols or DSP design.

Compensation & Benefits

The annual base salary range for this position is $143,800 - $230,000. Eligible for a discretionary annual bonus and equity awards.

Broadcom offers a comprehensive benefits package including medical, dental and vision plans, 401(k) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.