IC Verification Engineer

Broadcom Inc.; Wayne (CA); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Medical coverage

401K matching

ESPP

EAP

Holidays

Paid leave

Family leave

Job summary

Broadcom Inc. is a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions. We seek an experienced verification professional to architect scalable testbenches and drive functional coverage for Block/Core/SOC verification.

The role requires SystemVerilog with UVM/VMM, debugging complex designs, and mentoring junior engineers while leading verification strategy and reviews for high-performance architectures.

Qualifications

• Bachelor's degree in Electrical/Electronics/Equivalent with 12+ years of experience.
• 10+ years of experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing.
• Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification.
• Very proficient in System Verilog and Verification Methodologies like UVM/VMM.
• Good debug skills in analyzing regression failures and understanding of complex designs.
• A good understanding of a complex protocol like PCI Express or other multi-layered protocol.
• Work with the team and mentor junior engineers.

Responsibilities

• Architect and develop scalable Testbench environment using the framework of Verification Methodologies.
• Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
• Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure.
• Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps.
• Work with other members of the team, guide/mentor junior team members.
• Think differently and out-of-the-box to stress the DUT and verify it in an efficient way.
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc.
• Lead reviews with design/architecture.
• Driver Verification quality and Efficiency improvements.

Skills

SystemVerilog

UVM/VMM

ASIC verification

Debugging complex designs

PCIe protocol

Mentoring engineers

Leadership

Education

Bachelor's degree in Electrical/Electronics/Equivalent

Master's degree in Electrical/Electronics/Equivalent

Tools

Makefiles

Python

Perl

Job description

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

Welcome! Thank you for your interest in Broadcom! We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Job Duties

• Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies.
• Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
• Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure.
• Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps.
• Work with other members of the team, guide/mentor junior team members.
• Think differently and out-of-the-box to stress the DUT and verify it in an efficient way.
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc.
• Lead reviews with design/architecture.
• Driver Verification quality and Efficiency improvements.

Mandatory Requirements

• Bachelor's degree in Electrical/Electronics/Equivalent with 12+ years of experience; or Masters degree in Electrical/Electronics/Equivalent with 10+ years of experience
• 10+ years of experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing
• Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification
• Very proficient in System Verilog and Verification Methodologies like UVM/VMM
• Good debug skills in analyzing regression failures and understanding of complex designs
• A good understanding of a complex protocol like PCI Express or other multi-layered protocol
• Work with the team and mentor junior engineers

Additional Requirements

• Experience in PCIe protocol
• Scripting knowledge of Python or Perl
• Comfort with Makefiles
• Experience with Verifying with other protocols like AXI

Compensation

• The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
• As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Benefits

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays
• Paid sick leave and vacation time
• Broadcom follows all applicable laws for Paid Family Leave and other leaves of absence.

For more information please visit our video library and check out our Connected by Broadcom series.