DFT Technical Lead - Senior ASIC Engineer (Remote)

Apex Systems

Carlsbad (CA)

Hybrid

USD 140,000 - 190,000

Full time

5 days ago
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Benefits offered by this job

Medical insurance
401K with match
HSA
Employee Assistance Program

Job summary

Everforth Apex is seeking a Design for Test-Technical Lead to drive DFT development for advanced ASICs. You will lead the implementation of scan, mbist, BISR, and boundary scan, and support post-silicon debugging to ensure testability and yield across the product lifecycle.

This role demands 8–10 years of related experience, a degree in Electrical or Computer Engineering, and hands-on use of Tessent, Xcelium, Genus, and Tempus/Primetime.

Qualifications

  • Bachelor's or Master's in Electrical or Computer Engineering is required.
  • 8–10 years of relevant experience in DFT, JTAG, scan, BIST and post-silicon debug.
  • Experience with integrating 3rd party IP and high-speed analog/digital macros.

Responsibilities

  • Implement Hardware Design-for-Test (DFT) features including scan, mbist, BISR, and boundary scan.
  • Set up and debug DFT simulations and support post-silicon testing and debug.
  • Develop innovative DFT IP and integrate testability into RTL with multi-functional teams.
  • Participate in creating hardware DFT and physical design strategies for new silicon models.
  • Drive reusable test and debug strategies for bare die and stacked die configurations.
  • Craft solutions and debug with minimal mentorship.

Skills

DFT engineering
Leadership & mentoring
Debugging & problem solving
Cross-functional collaboration

Education

Bachelor's or Master's in Electrical or Computer Engineering

Tools

Tessent
Xcelium
Genus
Tempus
Primetime

Job description

Everforth Apex is seeking a Design for Test-Technical Lead to drive DFT development for advanced ASICs. You will lead the implementation of scan, mbist, BISR, and boundary scan, and support post-silicon debugging to ensure testability and yield across the product lifecycle.

This role demands 8–10 years of related experience, a degree in Electrical or Computer Engineering, and hands-on use of Tessent, Xcelium, Genus, and Tempus/Primetime.

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