DFT Architect: AI-Ready SoC Test & Yield Leader

Advanced Micro Devices, Inc.

San Jose (CA)

On-site

USD 120,000 - 160,000

Full time

14 days+
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

A leading technology company is seeking a DFT Architect in San Jose, California, to drive the DFT architecture for future products. The ideal candidate will have strong DFT engineering experience and leadership skills. You will collaborate with multiple teams to ensure successful implementations, driving enhancements in test environments and quality. The position requires effective communication and a strong technical background in DFT methodologies.

Qualifications

  • Significant DFT engineering experience through pre and post silicon cycles.
  • Experience in creating complex chip-level DFT architecture.
  • Good communication skills and teamwork across continents.

Responsibilities

  • Promote ATE & production test environment enhancements.
  • Manage DFT activities for new products.
  • Drive internal DFT teams for correct implementation.

Skills

DFT engineering experience
Leadership skills
Communication of complex subjects

Education

MS or Ph.D. in Electrical/Electronic/Computer Engineering

Tools

DFT tools
ATPG
Oscilloscope
Logic analyser

Job description

A leading technology company is seeking a DFT Architect in San Jose, California, to drive the DFT architecture for future products. The ideal candidate will have strong DFT engineering experience and leadership skills. You will collaborate with multiple teams to ensure successful implementations, driving enhancements in test environments and quality. The position requires effective communication and a strong technical background in DFT methodologies.
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Lead ASIC DFT Architect
Lead ASIC DFT Architect

Accord Technologies Inc • San Jose (CA)

On-site
USD 130,000 - 170,000
Senior DFT Engineer for ASIC/SoC Test & Validation
Senior DFT Engineer for ASIC/SoC Test & Validation

Etched • San Jose (CA)

On-site
USD 160,000 - 230,000
Medical, dental, and vision insurance
Housing subsidy of $2k/month
Relocation support
+2
Senior DFT Architect: ASIC Test & Silicon Debug
Senior DFT Architect: ASIC Test & Silicon Debug

Nokia • San Jose (CA)

On-site
USD 130,000 - 160,000
Lead DFT & MBIST Architect for Production Silicon
Lead DFT & MBIST Architect for Production Silicon

Fortell Research Inc. • San Francisco (CA)

Hybrid
USD 160,000 - 300,000
Stock options
Generous benefits package
Senior DFT Architect - Lead Test Strategy for AI/SoC
Senior DFT Architect - Lead Test Strategy for AI/SoC

TylSemi, Inc. • San Jose (CA)

On-site
USD 238,000 - 286,000
DFT Engineer, SoC Test & IP — Austin Onsite, Equity
DFT Engineer, SoC Test & IP — Austin Onsite, Equity

Mogi I/O : OTT/Podcast/Short Video Apps for you • Austin (TX)

On-site
USD 170,000 - 200,000
DFT Architect: Lead Silicon Test & MBIST Strategy
DFT Architect: Lead Silicon Test & MBIST Strategy

Advanced Micro Devices • San Jose (CA)

Hybrid
USD 180,000 - 260,000
AMD Benefits at a glance
Equal opportunity employer
Senior DFT Architect - FPGA/SoC & 2.5D/3D Innovation
Senior DFT Architect - FPGA/SoC & 2.5D/3D Innovation

191 Altera Corporation • San Jose (CA)

On-site
USD 209,000 - 300,000
DFT Engineer: AI Accelerator SoC & Test Automation
DFT Engineer: AI Accelerator SoC & Test Automation

Fractile • Bristol (VA)

On-site
USD 80,000 - 120,000
Lead DFT Architect for Next-Gen AI Chips
Lead DFT Architect for Next-Gen AI Chips

SambaNova • San Jose (CA)

On-site
USD 180,000 - 255,000
Equity
Medical insurance
HSA
+1