Device Integration Engineer - Yield & Transistor Optimization

Bzpp; United States; On-site; USD 95,000 - 120,000; Full time

Job summary

Samsung Austin Semiconductor is seeking a highly driven Device Integration Engineer to optimize transistor performance and maximize yield across 14nm Derivative generation. You will collaborate with Module Integration and Process Architecture teams to define targeting conditions for next-generation devices.

Responsibilities include analyzing ET trends, owning Parametric Yield and WAT management, running experiments to push device performance and reliability, and supporting process integration

Qualifications

• BS in Electrical/Computer/Materials related field required; MS/PhD a plus.
• 3+ years in semiconductor industry required.
• Experience with device physics and process interactions to meet specs.

Responsibilities

• Ensure targeting of transistor-focused Electrical Test (ET) trends to customer/product specifications and perform timely root cause analysis for shifts or abnormalities.
• Owns Parametric Yield and Wafer Acceptance Electrical Test (WAT) management for one or more customer accounts/products.
• Execute and analyze experiments to optimize transistor performance/variation with end goal of improving Parametric Yield and ensuring a reliable and manufacturable product.
• Drive Task Force Teams to solve systematic yield, performance, or reliability issues.
• Support unit process (e.g., CMP, Etch) or process integration team with evaluation of device impact for key change points (cost/step reduction, throughput improvement).

Skills

Device physics understanding

Parametric Yield optimization

Transistor performance analysis

ET data interpretation

Education

Bachelor's degree in Electrical/Computer/Materials related field

Masters or PhD advantageous

Tools

Inline metrology

FDC data systems

Job description

Samsung Austin Semiconductor is seeking a highly driven Device Integration Engineer to optimize transistor performance and maximize yield across 14nm Derivative generation. You will collaborate with Module Integration and Process Architecture teams to define targeting conditions for next-generation devices.

Responsibilities include analyzing ET trends, owning Parametric Yield and WAT management, running experiments to push device performance and reliability, and supporting process integration