Design Verification Engineer

Quest Global; San Jose (CA); On-site; USD 120,000 - 190,000; Full time

Job summary

A leading engineering firm in San Jose is seeking a Design Verification Engineer to verify SoC functional correctness and collaborate with cross-functional teams. The ideal candidate has over 10 years of experience in block verification, knowledge of ARM architecture, and proficiency in UVM and C programming. This full-time, on-site position offers a competitive salary ranging from $120,000 to $190,000, and requires commuting arrangements to the Santa Clara location.

Qualifications

• 10+ years of experience in verification of SoC IPs and peripherals.
• Proficiency in writing and debugging tests in UVM and C.

Responsibilities

• Verify the functional correctness of SoC.
• Collaborate with engineers on verification strategies.
• Work with Emulation/FPGA team for board-level stimulus.

Skills

Verification of SoC

Collaboration with designers

Understanding ARM architecture

Coding in UVM and C

Creating test benches

Education

Bachelor's degree in Electrical Engineering

Job description

Join to apply for the Design Verification Engineer role at Quest Global

Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging deep industry knowledge and digital expertise. The company solves complex challenges across aerospace & defense, automotive, energy, hi‑tech, healthcare, medical devices, rail and semiconductor industries.

What You Will Do

• Verify the functional correctness of SoC, contributing to a team that writes test plans and defines test methodologies.
• Collaborate with designers and architects to understand design specifications and build functional verification strategy.
• Work with the Emulation/FPGA team to understand verification collaterals required for driving stimulus at the board level.
• Collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development.

What You Will Bring

• Experience in block/IP/sub‑system level verification of SoC IPs and peripherals, with ARM based boot environment preferred.
• Knowledge of ARM architecture and AMBA bus standards like AXI‑4.
• Experience with industry‑standard interfaces such as PCIe (preferably Gen‑6) and NVMe 2.0.
• Experience coding UVM SoC/sub‑system level test benches, BFM, scoreboards, and monitors.
• Proficiency in writing and debugging tests in UVM and C.

Experience & Education

• Bachelor’s degree in Electrical Engineering or a related field. 10+ years of experience (MS or PhD beneficial).

Pay Range

$120,000 – $190,000 K

Work Requirements

• Position is on‑site in Santa Clara, California.
• You must be able to commute to and from the location with your own transportation arrangements.

Seniority Level

Mid‑Senior level

Employment Type

Full‑time