Design Verification Engineer

Quest Global; San Jose (CA); On-site; USD 200,000 - 250,000; Full time

Job summary

An established industry player is seeking a talented verification engineer to ensure the success of custom silicon designs. This role emphasizes collaboration across teams and time zones, requiring strong analytical and problem-solving skills. You'll be involved in the design verification of SOCs, utilizing your expertise in HVL and programming languages like C/C++. If you're passionate about digital design and eager to tackle complex challenges, this opportunity is perfect for you. Join a dynamic team where your contributions will directly impact the success of innovative silicon products.

Qualifications

• Passion for modern processor architecture and digital design.
• Experience in verification methodologies and flows.

Responsibilities

• Design verification of SOCs with embedded ARM CPUs and DSPs.
• Strong in constraint random verification, assertion writing, and debugging.

Skills

Design Verification

HVL (UVM / System Verilog / OVM)

C/C++

Perl

TCL

Analytical Skills

Problem-Solving Skills

Communication Skills

Tools

EDA Tools

Job description

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The focus of this role is to plan, build, and execute the verification of new and existing features for our custom silicon/ASIC designs, resulting in zero bugs in the final design to ensure first time silicon success.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You should be a team leader with excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Key Responsibilities

• Design Verification of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.
• Strong in HVL (UVM / System Verilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows.
• Strong in constraint random verification, assertion writing, coverage analysis, debugging.
• Familiarity with ARM cores, formal verification, SV DPI-C is a plus.
• Experience with AMS/Low Power verification techniques and verifying mixed signal ICs a plus.
• Good knowledge of EDA tools. Experience with signal processing and FPGA based prototyping a plus.
• Must be a team player with good oral and written communication skills.
• Self-motivated with the ability to work independently and interface effectively with engineers across divisions and remote locations.

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Design and Engineering

Industries

Engineering Services and Semiconductor Manufacturing