DDR Subsystem Firmware Engineer

Qualcomm; San Diego (CA); On-site; USD 122,000 - 183,000; Full time

Job summary

Qualcomm Technologies, Inc. seeks an ASIC Engineer to define, model, design and verify IP for high-performance, low-power products across digital and/or analog blocks.

You will collaborate with cross-functional teams to drive silicon-ready solutions from pre-silicon validation to production. The ideal candidate has a BS/MS/PhD with embedded systems and C firmware experience, strong debugging skills, and familiarity with Verilog/SystemVerilog, LPDDR memory protocols, FPGA/emulation platforms, and

Qualifications

• BS/MS/PhD with embedded systems, hardware or software focus.
• Experience in ASIC design or related work.
• Knowledge of memory subsystems is a plus.

Responsibilities

• Define, model, design, verify and document IP blocks/SOCs.
• Collaborate with DV, software and architecture teams.
• Perform firmware development in C and debug across DV environments.
• Bring-up and validate DDR/LPDDR subsystems pre- and post-silicon.
• Analyze stability, performance and power metrics to guide decisions.
• Support next-generation memory subsystem validation and optimizations.

Skills

Embedded systems

C programming

Firmware development

System-level debugging

Digital design

Verilog/SystemVerilog knowledge

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

PhD in Science, Engineering, or related field

Tools

Verilog/SystemVerilog

Emulation platforms

FPGA prototyping

Python scripting

Silicon bring-up

Job description

Qualcomm Technologies, Inc. seeks an ASIC Engineer to define, model, design and verify IP for high-performance, low-power products across digital and/or analog blocks.

You will collaborate with cross-functional teams to drive silicon-ready solutions from pre-silicon validation to production. The ideal candidate has a BS/MS/PhD with embedded systems and C firmware experience, strong debugging skills, and familiarity with Verilog/SystemVerilog, LPDDR memory protocols, FPGA/emulation platforms, and