Senior ASIC Design Engineer – High-Speed Memory & Cache

Qualcomm; San Diego (CA); On-site; USD 101,000 - 152,000; Full time

Job summary

Qualcomm Technologies, Inc. seeks a seasoned ASIC Engineer to define, model and design RTL for high-performance memory controllers and related IP. You will verify, implement and document the work while collaborating with CPU, DSP and multimedia teams across multiple projects.

The role emphasizes front-end architecture, timing analysis, power optimization, and rigorous debugging during integration into full chips. A Master's degree is preferred.

Qualifications

• Bachelor's or Master's in Science or Engineering.
• 3+ years of experience for senior level is welcomed.
• Experience with high speed memory systems and controllers.

Responsibilities

• Define, model, design RTL for IP/SoC blocks.
• Verify, validate, implement and document IP development.
• Work with cross-functional teams to determine execution path.

Skills

ASIC design

RTL coding

Synthesis

Timing closure

Debugging

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Computer Engineering and/or Electrical Engineering

Tools

HDL (Verilog/VHDL)

Synthesis tools

Memory controller experience

NoC front end architectures

x86/ARM CPU architectures

Job description

Qualcomm Technologies, Inc. seeks a seasoned ASIC Engineer to define, model and design RTL for high-performance memory controllers and related IP. You will verify, implement and document the work while collaborating with CPU, DSP and multimedia teams across multiple projects.

The role emphasizes front-end architecture, timing analysis, power optimization, and rigorous debugging during integration into full chips. A Master's degree is preferred.