DDR PHY System Design Engineer (San Diego, US)

Qualcomm

San Diego (CA)

On-site

USD 140,000 - 210,000

Full time

14 days+
Application generator

Get a reply from this employer — a resume and cover letter tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Annual discretionary bonus program
RSU grants
Competitive benefits package

Job summary

Qualcomm seeks a skilled system architect in San Diego to design high-speed, high-performance DDR PHYs aimed at 5G, AI/ML, and automotive applications. This role involves the full design process from conceptualization to final chip production.

Ideal candidates will have experience in DDR PHY design, a strong grasp of JEDEC standards, and excellent communication skills. Competitive pay ranges from $140,000 to $210,000, along with comprehensive benefits.

Qualifications

  • 5-10 years in DDR PHY system design/architecture required.
  • Strong knowledge of link budgets and training is necessary.
  • Experience with signal integrity and power delivery preferred.

Responsibilities

  • Analyze and own DDR PHY system and architecture.
  • Develop system timing budgets, both on-die and off-chip.
  • Lead and deliver solutions for product needs.

Skills

DDR PHY system design/architecture
Knowledge of JEDEC DDR standards
Strong communication skills

Education

Bachelor's degree in Science, Engineering, or related field
Master's degree in Science, Engineering, or related field
PhD in Science, Engineering, or related field

Tools

Unix
Perl
TCL scripting

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group > ASICS Engineering

Role Overview

QCT mixed‑signal IP design team is looking for a skilled system architect to help design high‑speed, high‑performance, and low‑power DDR PHYs for Qualcomm’s products targeted for 5G, AI/ML, compute, and automotive applications. This role is part of the DDR PHY design team and involves system design, building, and testing—from early ideas all the way to final chip production and validation.

Responsibilities
  • Analysis and ownership of DDR PHY system and architecture
  • Development of system timing budgets, both on‑die and off‑chip
  • Lead and deliver best‑in‑class solutions for product needs
Required Qualifications
  • 5‑10 years in DDR PHY system design/architecture
  • Strong knowledge of JEDEC DDR standards (LPDDR/PCDDR/HBM, etc.) and their implications for DDR PHY system design/architecture
  • Strong knowledge of link budgets and training
  • Strong communication skills; proven ability to collaborate across global teams
Preferred Qualifications
  • Knowledge of signal integrity and power delivery for server products
  • Knowledge of latest process technology nodes and mixed‑signal designs
  • Solid understanding of design‑for‑yield and production challenges in high‑speed links
  • Unix/Perl/TCL scripting (comfortable writing scripts)
Minimum Qualifications
  • 4+ years of ASIC design, verification, validation, integration, or related work experience with a bachelor’s degree in Science, Engineering, or related field
  • 3+ years of ASIC design, verification, validation, integration, or related work experience with a master’s degree in Science, Engineering, or related field
  • 2+ years of ASIC design, verification, validation, integration, or related work experience with a PhD in Science, Engineering, or related field
Pay and Benefits

Pay range: $140,000.00 – $210,000.00.

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is one component of total compensation. Complimentary annual discretionary bonus program and opportunity for annual RSU grants are provided. Competitive benefits package supports your success at work, at home, and at play.

EEO Statement

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. Contact disability‑accommodations@qualcomm.com or call Qualcomm’s toll‑free number for reasonable accommodations. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. The above email address is used to provide reasonable accommodations for individuals with disabilities; it will not be used for updates on applications or resume inquiries.

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

DDR PHY System Architect - High-Performance, Low-Power
DDR PHY System Architect - High-Performance, Low-Power

Qualcomm • San Diego (CA)

On-site
USD 140,000 - 210,000
Annual discretionary bonus program
RSU grants
Competitive benefits package
ASIC/RTL Design Engineer for High-speed Interfaces
ASIC/RTL Design Engineer for High-speed Interfaces

Nutanix • San Diego (CA)

On-site
USD 140,000 - 210,000
DDR Bench Characterization Engineer
DDR Bench Characterization Engineer

Socket.dev • San Diego (CA)

On-site
USD 94,000 - 141,000
ASIC/RTL Design Engineer for High-speed Interfaces
ASIC/RTL Design Engineer for High-speed Interfaces

Qualcomm • San Diego (CA)

On-site
USD 140,000 - 210,000
Senior Engineer, DDR Customer Engineering Software
Senior Engineer, DDR Customer Engineering Software

Qualcomm • Santa Clara (CA)

On-site
USD 124,000 - 186,000
Next-Gen, High-Speed HBM, LPDDR Memory Controller ASIC Digital Design Engineer
Next-Gen, High-Speed HBM, LPDDR Memory Controller ASIC Digital Design Engineer

Qualcomm • San Diego (CA)

On-site
USD 140,000 - 230,000
Annual bonus program
RSU grants
Benefits package
Memory Control Design Engineer
Memory Control Design Engineer

Qualcomm • San Diego (CA)

On-site
USD 115,000 - 174,000
Competitive annual discretionary bonus
Annual RSU grants
Highly competitive benefits package
Senior SOC Physical Design Engineer
Senior SOC Physical Design Engineer

Qualcomm • Austin (TX)

On-site
USD 124,000 - 173,000
San Diego, California, United States of America ASICS Engineering Posted a day ago
San Diego, California, United States of America ASICS Engineering Posted a day ago

Qualcomm • San Diego (CA), Northern (KY)

Hybrid
USD 140,000 - 210,000
DDR Bench Characterization Engineer
DDR Bench Characterization Engineer

Qualcomm • San Diego (CA)

On-site
USD 94,000 - 141,000
Annual RSU grants
Discretionary bonus program
Competitive benefits package
+1