DDR Bench Characterization Engineer

Qualcomm

San Diego (CA)

On-site

USD 94,000 - 141,000

Full time

20 hours ago
Be an early applicant

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Annual RSU grants
Discretionary bonus program
Competitive benefits package
Career development opportunities

Job summary

Qualcomm Technologies, Inc. in San Diego seeks an engineer for testing high‑speed IPs and LP‑DDR/PC‑DDR subsystems. You will define and execute characterization plans, drive root cause analysis, and develop automated test scripts for efficient silicon evaluation across condition variations.

The role emphasizes data‑driven decision making, debugging, and cross‑functional collaboration with IC Design, Systems, and Hardware Applications teams to ensure robust design and manufacturing readiness.

Qualifications

  • Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, or related field.
  • Master’s degree in Electrical/Computer Engineering or related field.
  • Experience with Python/C# for test automation is required.
  • Strong problem solving, debugging and communication skills are essential.

Responsibilities

  • Develop test methodologies and characterization plans for LP-DDR and PC-DDR subsystems.
  • Analyze silicon performance across process, voltage, and temperature variations.
  • Automate test scripts, procedures, and data processing to accelerate bring-up and characterization.

Skills

Python
C#
Test automation
Problem solving
Debugging
Communication skills

Education

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field
Master's degree in Electrical/Computer Engineering or related field

Tools

Oscilloscopes
TDRs/VNAs
J-BERT
Power measurement tools

Job description

Job Area:

Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip). Main responsibilities include defining and executing the development of Test methodologies and characterization of leading-edge LP-DDR & PC-DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY IP, IO circuits and termination networks, Clocking architecture, Delay circuits, Power Distribution Network) as well as other proprietary interfaces. Responsibilities include developing and executing characterization plans for High Speed IPs to optimize design parameters and validate electrical compliance, driving corresponding first silicon bring-up & debug to qualify designs fabricated at external foundries. This role requires performing parametric analysis of silicon behavior over various operating process, voltage and temperature conditions and configurations, and driving root‑cause failure analysis to closure for design, test, or system‑level issues. This position also involves developing and automating test scripts, measurement procedures, and data processing flows to accelerate silicon evaluation, improve turnaround time, and enable data‑driven decision‑making during bring‑up and characterization phases. The engineer will contribute to guard‑banding strategies and characterization sign‑off to support downstream manufacturing readiness. Engineer will also assist in HW design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design. Engineer will be working closely with cross-functional teams such as IC Design, Systems Engineering for chip/circuit bring -up, debug and feature enablement. The role also requires close collaboration with Customer Engineering and Hardware Applications teams to resolve customer issues/RMA debug in a time‑critical environment including providing clear debug analysis, technical recommendations, and design feedback.
This position is ideal for engineers who excel in silicon debug, high-speed interface analysis, and data-driven optimization of complex mixed signal systems and who are motivated to drive issues to closure across cross‑functional teams. The individual selected for the position should be passionate about delivering quality work products, seek to continually learn about new products as well as essential knowledge of industry trends, competitor products, and advances in various engineering fields from publicly available information and assist in conducting specialized analyses (e.g., feasibility studies, signal integrity, teardown analyses).

Minimum Qualifications:

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Preferred Qualifications

  • English fluent (>95% verbal and written).
  • Work Experience: 1-3+ years of experience in related areas. (fresh graduates welcome to apply)
  • Experience with Python/C# for test automation is required
  • Master's Degree in Electrical/Computer Engineering or related field.
  • Strong understanding of VLSI technologies, CMOS analog and digital integrated circuits, mixed-signal and semiconductor physics.
  • Knowledge of High-Speed test and characterization including eye diagram characteristics, differential signals, jitter analysis, signal integrity etc. is preferred.
  • Familiarity with DDR 2/3/4/5, LPDDR 2/3/4/5 protocol, interface, IO receiver/transmitter, timing diagrams and device specifications is a plus.
  • Hands‑on experience with lab equipment such as Oscilloscopes, TDRs/VNAs, J-BERT etc. and power measurement tools is preferred.
  • Familiarity with Board Design concepts (Schematic reviews, Layout best practices etc.) is a plus.
  • Strong ASIC device level characterization skills. System level knowledge is a plus.
  • Knowledge in test automation development/scripting/debugging is a plus.
  • Strong verbal and written communications skills as well as good organization and documentation skills.
  • Strong problem solving & debugging skills. Ability to work independently and with good initiative to overcome technical challenges.
  • Strong Interpersonal and teamwork skills with proven ability to work effectively in a fast‑paced multi-disciplinary environment.
  • Ability to document characterization results, debug findings, methodology updates, and design recommendations with clarity and technical rigor.
  • Able to work independently and with good initiative to overcome technical challenges. Meeting project deadlines and characterization (char) milestones would be required.
  • Strong verbal and written communications skills. Effective communication within and outside the team is essential. Clear, data-driven analysis and preparing high quality reports, and presenting them effectively to internal stakeholders across teams is required. Able to organize effectively and document work thoroughly while working with local and remote team including debug findings, methodology updates, and design recommendations with clarity and technical rigor.

Minimum Qualifications

  • Bachelor's degree in Computer Engineering, Electrical/Electronics Engineering or related field and 1+ years in Hardware engineering or related work experience
  • Master's degree in Computer Engineering, Electrical/Electronics Engineering or related field.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑accomodations@qualcomm.com or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay Range and Other Compensation & Benefits:
$94,200.00 - $141,200.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

DDR Bench Characterization Engineer
DDR Bench Characterization Engineer

Socket.dev • San Diego (CA)

On-site
USD 94,000 - 141,000
Bench Test Engineer
Bench Test Engineer

Qualcomm • San Diego (CA)

On-site
USD 94,000 - 141,000
Bench Test Engineer
Bench Test Engineer

Socket.dev • San Diego (CA)

On-site
USD 94,000 - 141,000
Bench Test Engineer
Bench Test Engineer

Nutanix • San Diego (CA)

On-site
USD 94,000 - 141,000
Senior Engineer, DDR Customer Engineering Software
Senior Engineer, DDR Customer Engineering Software

Qualcomm • Santa Clara (CA)

On-site
USD 124,000 - 186,000
Design Verification Engineer — Memory Subsystem
Design Verification Engineer — Memory Subsystem

Socket.dev • Santa Clara (CA)

On-site
USD 153,000 - 230,000
Principal Engineer, Signal and Power Integrity
Principal Engineer, Signal and Power Integrity

Socket.dev • San Diego (CA)

On-site
USD 202,000 - 302,000
CPU DFT Engineer
CPU DFT Engineer

Qualcomm • Santa Clara (CA)

On-site
USD 142,000 - 214,000
Competitive annual discretionary bonus
Annual RSU grants
Comprehensive benefits package
Senior HSIO Bench Test Engineer
Senior HSIO Bench Test Engineer

Qualcomm • San Diego (CA)

On-site
USD 111,000 - 167,000
Senior Digital Test Engineer
Senior Digital Test Engineer

Socket.dev • San Diego (CA)

On-site
USD 111,000 - 167,000
Annual bonus
RSU grants