Customer Engagement Engineer II

RiseMe; San Jose (CA); On-site; USD 105,000 - 195,000; Full time

Benefits offered by this job

Bonus

Equity

Benefits

Job summary

Cadence seeks a customer support engineer in California to assist customers and field teams with Palladium, Protium, and PDAPP products. You will handle SFDC cases, test fixes, and track metrics in JIRA, collaborating with R&D and sales as needed.

The role requires a BS-EE/CE (MS preferred) with 1+ year in design/verification or support, HDL knowledge, and Unix/Linux scripting proficiency. Strong communication is essential for resolving complex issues.

Qualifications

• BS/MS in EE/CE with design/verification experience.
• Proficiency in HDL and design/debug techniques.
• Ability to create test cases for customer issues.

Responsibilities

• Handle incoming SFDC cases from field AEs and customers.
• Report bugs to R&D and collect collaterals/testcases.
• Test R&D fixes/patches and track metrics in JIRA.
• Communicate complex issues clearly to teams and customers.

Skills

HDL: Verilog/SystemVerilog/VHDL

Digital design

JIRA experience

SFDC case handling

Unix/Linux scripting

Emulation (Palladium)

Communication skills

ASIC knowledge

Education

BS in Electrical/Computer Engineering

MS in EE/CE preferred

Tools

Palladium emulation

JIRA

SFDC (Salesforce)

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As an integral member of the HSV Customer Support Team, you will work with our customers and field AE teams and R&D groups to provide technical support for our Palladium, Protium and Virtual Protocol (PDAPP) products. You will enjoy the experience and challenge in working with a broad spectrum of designs and customers.

Responsibilities includes:

• Handling incoming SFDC cases reported by field AEs and customers.
• Report any tool bugs to R&D and work with field AE and customer to collect necessary collaterals and/or testcases.
• Test R&D fixes/patches.
• Tracking customer metrics in JIRA system, generating quality report for management.
• undefinedPosition Requirements:Requires a BS-EE/CE (MS-EE/CE preferred) with a minimum of 1 years experience in design and/or verification of complex digital designs, or Applications engineering/technical support role.General knowledge of design debug techniques and a strong understanding in logic design.General knowledge in verification methodologies for complex EDA environments.Proficiency in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quickly.Proficiency in Unix/Linux scripting languages (ksh/bash/csh).Experience with emulation, Cadence's Palladium product preferred.General knowledge in TBA, SVA, SV coverage, Low Power(UPF). UVM experience is a plus.General knowledge in PCIe, USB and Ethernet protocol.Excellent communication skills. Must have ability to communicate complex issues to internal teams and customers in a clear and concise manner.Occasional travel may be required to resolve critical customer issues.undefined

The annual salary range for California is $105,000 to $195,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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