Customer Engagement Architect

Cadence Design Systems, Inc.; San Jose (CA); On-site; USD 186,000 - 345,000; Full time

Benefits offered by this job

Paid vacation

Paid holidays

401(k) match

Employee stock purchase plan

Medical/dental/vision plans

Other benefits

Job summary

Cadence Design Systems, Inc. in San Jose, CA seeks an experienced engineering professional to provide advanced technical support for Palladium/Protium and PDAPP products. You will work with customers, field AEs and R&D to optimize performance, refine compiler features, and train users on deployment in demanding environments.

The role requires deep HDL expertise, verification know-how, and scripting fluency, with occasional travel to resolve critical issues and to engage with customers directly.

Qualifications

• MS-EE/CE with 8+ years of experience in design or verification of complex digital designs.
• Strong knowledge of verification methodologies for complex EDA environments.
• Expertise in HDL languages (Verilog, SystemVerilog, VHDL) and test-case creation.
• Expertise in Unix/Linux scripting (ksh/bash/csh/perl).
• UVM experience is a plus; familiarity with CPF/UPF Low Power is beneficial.

Responsibilities

• Work with customers on performance tuning and issue resolution with field AEs and R&D.
• Refine advanced compiler features with R&D and train customers in deployment of features.
• Handle customer issues and CID escalations with engineering leadership.
• Debug customer-reported failures; create test cases to replicate issues and log with HSV R&D.
• Test R&D fixes/patches and validate hardware/software changes.
• Develop expertise in hardware/software and support HSV field service for HW/SW issues.
• Collaborate with customers to specify enhancement requests for future releases.
• Test new product features for future software/hardware releases and participate in beta programs.
• Update product training materials for customer deployments.
• Occasional travel up to 10% may be required to resolve critical issues.

Skills

Verilog/SystemVerilog/VHDL

Test case creation

Unix/Linux scripting

Design debugging techniques

Verification methodologies

UVM experience

Emulation (Palladium/Protium)

Education

MS in EE/CE

Tools

Cadence Palladium/Protium

Job description

SAN JOSE

Full time

R56485

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As an integral member of the HSV Engagement/Support Team, you will work with our customers and field AE teams and R&D groups to provide technical support for our Palladium, Protium and Virtual Protocol (PDAPP) products. You will enjoy the experience and challenge in working with a broad spectrum of designs and customers.

Responsibilities includes:

• Work with customers on performance tuning.

• Work with R&D in refining advanced compiler features.

• Train customers in deploying advanced compiler features.

• Handling issues reported by field AEs and customers.

• Handle critical accounts escalation (Customer in Distress - CID) process and work closely with R&D managers in resolving critical customer issues.

• Debug customer reported failures, produce test cases to replicate failure and log issues with HSV R&D teams.

• Recommend potential workaround or application level solutions to customers when necessary.

• Test R&D fixes/patches.

• Develop expertise in h/w and f/w and support HSV field service team for h/w and f/w related issues.

• Work with customer and internal groups to spec out enhancement requests.

• Testing new product features for future s/w releases or h/w platform, including participation in internal beta activities.

• Updating product training materials.

Position Requirements:

• Requires a MS-EE/CE with 8+ years of experience in design and/or verification of complex digital designs, or Applications engineering/technical support role.

• Strong knowledge of design debug techniques and a strong understanding in logic design.

• Strong knowledge of verification methodologies for complex EDA environments.

• Expertise in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quickly.

• Expertise in Unix/Linux scripting languages (ksh/bash/csh/perl).

• Expertise TBA, SV assertions/coverage, Low Power(CPF/UPF). UVM experience is a plus.

• Experience with emulation, Cadence's Palladium/Protium product preferred.

• Excellent communication skills. Must have ability to communicate complex issue to internal teams and customers in a clear and concise manner.

• Occasional travel may be required to resolve critical customer issues.

• Occasional travel, up to 10% (measured over the course of a rolling 12 month period), may be required to resolve critical customer issues.

The annual salary range for California is $185,500 to $344,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.