CPU Physical Design Engineer: Power, Speed & Innovation

Intel Corporation; Austin (TX); Vor Ort; USD 142.000 - 232.000; Vollzeit

Zusammenfassung

Intel is seeking an experienced CPU Physical Design Engineer to drive the synthesis, place-and-route and timing closure of high-performance core designs in Austin. You will collaborate with architecture, CAD teams and industry vendors to optimize power, frequency and area across multiple design stages.

Key tasks include Synthesis, P&R, STA, power integrity, and verification, with emphasis on RTL to GDS methodologies and formal equivalence. On-site role with competitive compensation.

Qualifikationen

• Bachelor's or higher degree in a related field with strong design experience.
• 4+ years in Synthesis of a digital logic block or partition.
• Completion of Tape Out on advanced technologies.

Aufgaben

• Synthesize, place and route, and finalize CPU designs for manufacturing.
• Perform timing analysis, power integrity, and design closure.
• Collaborate with logic, circuit, architecture and EDA teams to improve CPUs.
• Verify with formal methods, DRC/LVS, and noise flow.

Kenntnisse

Synthesis of digital logic

IC design tools (Synopsys Cadence)

PV convergence

Physical design verification

TCL scripting

Tape Out experience

Floorplanning & routing

STA & Noise analysis

RTL to GDS

CPU timing optimization

Timing constraints

Clocking collaboration

Ausbildung

Bachelor's degree in Computer Engineering or Electrical Engineering

Master's degree in Computer Engineering or Electrical Engineering

Tools

Synopsys

Cadence

Noise analysis tools

Jobbeschreibung

Intel is seeking an experienced CPU Physical Design Engineer to drive the synthesis, place-and-route and timing closure of high-performance core designs in Austin. You will collaborate with architecture, CAD teams and industry vendors to optimize power, frequency and area across multiple design stages.

Key tasks include Synthesis, P&R, STA, power integrity, and verification, with emphasis on RTL to GDS methodologies and formal equivalence. On-site role with competitive compensation.