Physical Design Methodology Lead Engineer

AMD; Austin (TX); On-site; USD 170,000 - 210,000; Full time

Job summary

AMD is seeking a Physical Design Methodology Staff Engineer in Austin, TX to optimize our EDA tool-chain and advance flows from synthesis through signoff for GHz-class CPUs.

You will act as a power-user and flow-architect, collaborating with vendors and internal teams to push QoR, timing, and power targets while automating design-space exploration using Tcl and Python. This role demands deep EDA knowledge at 7nm/5nm/3nm nodes and a passion for scalable, repeatable flows.

Qualifications

• MS or PhD in Electrical Engineering, Computer Engineering, or a related field.
• Experience optimizing EDA tool-chains for GHz-class silicon.
• Strong scripting using Tcl/Python/Perl to automate flows.
• Experience with end-to-end physical design flows from synthesis to signoff.
• Ability to work with multiple vendors and customize APIs.

Responsibilities

• Flow Architecture: Design, implement, and maintain end-to-end physical implementation flows (Synthesis through Signoff) that prioritize scalability, reproducibility, and high QoR.
• EDA Tool Optimization: Act as the primary interface with EDA vendors to drive tool adoption, evaluate new features, and troubleshoot complex tool-behavior issues.
• Methodology Development: Develop and deploy advanced scripting frameworks (Tcl/Python) to automate design space exploration, ECO implementation, and multi-corner timing closure.
• PPA Optimization: Systematically analyze and tune tool settings—including placement density, routing congestion management, and clock tree synthesis (CTS) strategies to meet aggressive frequency and power targets.
• Signoff Integration: Build and refine automated signoff loops (STA, IR/EM, Physical Verification) to ensure high-confidence tape-outs with minimal iterations.
• Constraint Engineering: Develop and validate complex SDC constraints, ensuring that tool-driven optimizations are aligned with architectural intent and physical realities.
• Data-Driven Analysis: Utilize big-data approaches to analyze design metrics across multiple iterations, identifying trends in tool performance and implementing corrective methodology improvements.

Skills

EDA & Methodology Expertise

Tool Mastery

Scripting & Automation

Flow Customization

QoR Tuning

Data-Driven Analysis

Education

MS or PhD in Electrical Engineering, Computer Engineering, or a related field

Tools

Synopsys Fusion Compiler/ICC2

Cadence Innovus

Job description

AMD is seeking a Physical Design Methodology Staff Engineer in Austin, TX to optimize our EDA tool-chain and advance flows from synthesis through signoff for GHz-class CPUs.

You will act as a power-user and flow-architect, collaborating with vendors and internal teams to push QoR, timing, and power targets while automating design-space exploration using Tcl and Python. This role demands deep EDA knowledge at 7nm/5nm/3nm nodes and a passion for scalable, repeatable flows.