Chipset Program Manager – SoC Enablement (San Diego)

QUALCOMM, Inc.

San Diego (CA)

On-site

USD 133,000 - 199,000

Full time

14 days+

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Job summary

Qualcomm Technologies, Inc. in San Diego, CA seeks a Program Manager to lead CHS execution on chipset programs from planning through NPI. You will own schedules, resources, risks, and change requests while coordinating with engineering leads, BU managers, and Finance.

The role emphasizes semiconductor lifecycle understanding, package design, tape-out readiness, and leadership communication to drive decisions and align stakeholders.

Qualifications

  • Bachelor's degree in Engineering, Computer Science, or related field.
  • Master's degree may substitute for up to two years of work experience.
  • Experience with semiconductor development or HW SoC lifecycle is a plus.

Responsibilities

  • Own schedule management for CHS programs and maintain integrated schedule.
  • Assess downstream impact of partner schedules and present recovery options.
  • Plan HC and NRE with stakeholders and track against plan.
  • Track HC and NRE against plan as scope changes.
  • Manage CHS risk register, mitigation, and closure.
  • Assess impact of change requests on schedule, resources, and cost.
  • Manage tape-out checklist items and sign-offs.
  • Lead chipset core meetings and drive decisions to closure.
  • Escalate risks to leadership with options and trade-offs.
  • Set regular status cadence and prepare executive briefings; use AI dashboards for reporting.

Skills

MS Project
JIRA
AI tools
Communication skills
PMP
Scheduling
Stakeholder mgmt

Education

Bachelor's degree in Engineering/CS
Master's degree preferred

Tools

MS Project
JIRA
Power BI
Power Automate
Splunk
Tableau

Job description

Qualcomm Technologies, Inc. in San Diego, CA seeks a Program Manager to lead CHS execution on chipset programs from planning through NPI. You will own schedules, resources, risks, and change requests while coordinating with engineering leads, BU managers, and Finance.

The role emphasizes semiconductor lifecycle understanding, package design, tape-out readiness, and leadership communication to drive decisions and align stakeholders.

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