Chip Design Tools Architect — Product Engineer (Equity)

Cadence; San Jose (CA); On-site; USD 179,000 - 332,000; Full time

Job summary

Cadence in California is seeking a Product Engineer to drive advanced chip design software tool development and provide place-and-route expertise to customers and internal teams.

The role emphasizes hands-on timing closure for 7nm and below, strong communication, and collaboration with R&D, Application Engineering, and product marketing. Expect benchmarking, new workflows, and customer-facing support.

Qualifications

• BS in Electrical Engineering with 7+ years in digital implementation.
• Strong VLSI physical design, timing analysis, and clock tree routing.
• Experience with industry-standard EDA tools for 7nm nodes.
• Proficiency in scripting or AI tools is a plus.
• Excellent communication, both verbal and written.

Responsibilities

• Support Cadence’s digital products and track customer issues with R&D and release teams.
• Conduct design benchmarks and develop innovative flows and methodologies for customers.
• Collaborate with cross-functional teams to diagnose challenges and deliver organized solutions.

Skills

VLSI design

Timing analysis

Clock tree synthesis

Routing optimization

Silicon signoff

Communication skills

Education

BS in Electrical Engineering

Tools

EDA tools

Scripting/AI tools

Job description

Cadence in California is seeking a Product Engineer to drive advanced chip design software tool development and provide place-and-route expertise to customers and internal teams.

The role emphasizes hands-on timing closure for 7nm and below, strong communication, and collaboration with R&D, Application Engineering, and product marketing. Expect benchmarking, new workflows, and customer-facing support.