ASIC Timing Implementation Engineer

Meta; Austin (TX); On-site; USD 114,000 - 172,000; Full time

Job summary

Meta's Infrastructure Silicon team is seeking an ASIC Implementation Engineer specializing in timing to drive static timing analysis and timing closure across complex SoCs for data center applications.

You will collaborate with front-end and back-end teams, develop timing constraints, and validate sign-off reports across process, voltage, and temperature corners to meet performance targets.

Qualifications

• Bachelor's degree completed before joining Meta or equivalent practical experience.
• 2+ years of ASIC implementation experience focusing on static timing analysis and timing closure.
• Experience with industry-standard STA tools such as PrimeTime or equivalent.
• Experience developing and validating SDC timing constraints for complex designs.
• Experience with logic synthesis and timing-driven optimization techniques.
• Experience scripting in Python, Tcl, or Perl to automate timing analysis.

Responsibilities

• Develop and maintain timing constraints (SDC) for complex SoC designs, including clocks and delays.
• Perform static timing analysis and resolve setup/hold/clock skew violations across blocks.
• Drive timing closure with physical design teams, guiding placement, routing, and CTS.
• Analyze timing paths across clock domains and suggest RTL or physical optimizations.
• Generate and validate timing reports for sign-off across corners and SoC variants.
• Develop timing exception methodologies and waiver processes with design/verification teams.
• Contribute to timing closure scripts and automation to improve efficiency.

Skills

Timing constraints (SDC)

Static timing analysis

Timing closure

Clock domain timing

Timing reports

Timing exceptions

Automation of timing flows

Timing libraries

Synthesis constraints

Education

Bachelor's degree in Computer Science/Engineering or related field

Tools

PrimeTime

Logic synthesis tools

Clock Tree Synthesis

Job description

Meta's Infrastructure Silicon team is seeking an ASIC Implementation Engineer specializing in timing to drive static timing analysis and timing closure across complex SoCs for data center applications.

You will collaborate with front-end and back-end teams, develop timing constraints, and validate sign-off reports across process, voltage, and temperature corners to meet performance targets.