ASIC & SoC Design Engineer - RTL, PPA & Collaboration

Advanced Micro Devices; San Jose (CA); On-site; USD 120,000 - 150,000; Full time

Job summary

A leading technology company seeks a motivated individual for microarchitectural design in San Jose. The successful candidate will handle RTL implementation of FPGA configuration. Strong communication and analytical skills are required for collaboration with hardware and software teams. Candidates should have a degree in Electrical or Computer Engineering and a background in ASIC design. Join us and enhance your career in a dynamic environment focused on next-gen technology.

Qualifications

• Proven background experiences in ASIC design.
• Knowledge of industry-standard on-chip interconnect protocols (AMBA AXI/AXI-S/APB).
• Experience with industry-standard ASIC CAD tools.

Responsibilities

• Author micro-architecture specifications and own RTL implementation.
• Collaborate with teams to ensure robust solutions.
• Drive design from concept through production.

Skills

Communication skills

Analytical skills

Problem-solving skills

Collaboration

Education

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering

Tools

Verilog

System Verilog

Scripting languages (Perl, Python)

Job description

A leading technology company seeks a motivated individual for microarchitectural design in San Jose. The successful candidate will handle RTL implementation of FPGA configuration. Strong communication and analytical skills are required for collaboration with hardware and software teams. Candidates should have a degree in Electrical or Computer Engineering and a background in ASIC design. Join us and enhance your career in a dynamic environment focused on next-gen technology.