Wireless SoC Design Engineer

Apple; San Diego (CA); On-site; USD 171,600 - 302,200; Full time

Benefits offered by this job

Comprehensive medical coverage

Retirement benefits

Discounted products

Job summary

A leading tech company in San Diego is looking for an experienced engineer to develop microarchitecture and RTL for SoC design. This role requires a minimum of 10 years in ASIC design, with expertise in performance trade-offs and cross-functional teamwork. Candidates should have a BS degree and knowledge of the ASIC design flow, including System Verilog. Competitive compensation and comprehensive benefits are offered, alongside opportunities for stock ownership and educational reimbursement.

Qualifications

• 10+ years of relevant industry experience in ASIC design.
• Skilled in performance, power, and area trade-offs.
• Knowledgeable about ASIC design flow and implementation.

Responsibilities

• Define microarchitecture collaboratively with architecture and teams.
• Implement RTL adhering to design checks and requirements.
• Collaborate on verification and validation across all phases.
• Support pre-silicon verification and firmware development.
• Assist in post-silicon validation and debugging.

Skills

ASIC microarchitecture

System Verilog

Pre-silicon verification

Cross-functional collaboration

Education

BS degree

Tools

Lint

CDC

RDC

Synthesis

STA

Job description

Summary

Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply.

Description

Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements. Engage in hardware/software partitioning discussions with software and firmware teams. Collaborate cross-functionally to ensure successful SoC integration, supporting design verification and validation across all phases—from concept to silicon bring-up. Work closely with physical design, DFT, and CAD teams to optimize performance, power, and area (PPA) targets while ensuring design quality and maintainability.

Responsibilities

• Define microarchitecture working alongside architecture, software and firmware teams.
• Implement RTL that adheres to PPA requirements and Lint, CDC and RDC checks.
• Collaborate with Verification, DFT, Power, Physical design teams to deliver fully functional IP for SoC integration.
• Provide support for pre-silicon verification and software/firmware development.
• Assist in post-silicon validation, system integration and debugging effort.

Minimum Qualifications

• BS and 10+ years of relevant industry experience.
• Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs.
• Knowledgeable about the ASIC design flow, including System Verilog RTL implementation, Lint, CDC, RDC, Synthesis and STA.

Preferred Qualifications

• Expertise in design domains such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIE, QSPI, UART, and SPMI.
• Thorough understanding of cross clock-domain design principles and associated CDC requirements.
• Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis.
• Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques.
• Strong communication skills, both written and oral.

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Apple accepts applications to this posting on an ongoing basis.