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Cisco Silicon One is seeking an ASIC Packaging Signal/Power Integrity Hardware Engineer to join its ASIC team in a hybrid role in San Jose, CA. The position focuses on developing and verifying next-generation ASIC packaging to ensure high-speed signaling and robust power integrity across Cisco platforms.
Responsibilities include drafting design rules for ultra-high-speed signaling, performing SI/PI analyses, and coordinating with layout teams and vendors to achieve reliable, high-volume
Cisco Silicon One is seeking an ASIC Packaging Signal/Power Integrity Hardware Engineer to join its ASIC team in a hybrid role in San Jose, CA. The position focuses on developing and verifying next-generation ASIC packaging to ensure high-speed signaling and robust power integrity across Cisco platforms.
Responsibilities include drafting design rules for ultra-high-speed signaling, performing SI/PI analyses, and coordinating with layout teams and vendors to achieve reliable, high-volume