ASIC Formal Verification Engineer for TPU AI Hardware

Google LLC

Sunnyvale (CA)

On-site

USD 138,000 - 197,000

Full time

28 hours ago
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Job summary

Google LLC in Sunnyvale, California seeks an ASIC Formal Verification Engineer to shape TPU silicon and accelerate AI/ML workloads. You will verify complex digital designs focusing on TPU architecture within data-center accelerators, collaborating with design and verification teams to ensure robust silicon.

The role covers project definition, formal verification, silicon bring-up, and architecture documentation, with opportunities to impact products used by millions across software and hardware

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.
  • 4 years of experience with formal and design verification.
  • Experience with SystemVerilog or Verilog.
  • Experience with formal verification tools (e.g., Jasper, VC Formal, Questa Formal, 360-DV).

Responsibilities

  • Plan the formal verification strategy, create the properties and constraints for the digital design blocks.
  • Utilize formal property verification tools to verify properties and drive closure.
  • Resolve difficult to verify properties and improve verification methodologies.
  • Architect and implement reusable formal verification components.
  • Contribute to silicon bringup and verification of next-generation data centre accelerators.

Skills

Formal verification

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

SystemVerilog/Verilog
Jasper
VC Formal
Questa Formal
360-DV

Job description

Google LLC in Sunnyvale, California seeks an ASIC Formal Verification Engineer to shape TPU silicon and accelerate AI/ML workloads. You will verify complex digital designs focusing on TPU architecture within data-center accelerators, collaborating with design and verification teams to ensure robust silicon.

The role covers project definition, formal verification, silicon bring-up, and architecture documentation, with opportunities to impact products used by millions across software and hardware

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