ASIC Design Manager

Actalent; Littleton (CO); Hybrid; USD 175,000 - 277,000; Full time

Job summary

Tektronix in Littleton, CO is seeking an experienced ASIC Design Manager to lead the digital ASIC design and realization organization. You will oversee architecture, RTL, IP integration, physical design, signoff, tapeout, and silicon bring-up while mentoring engineers across teams.

The role emphasizes strong collaboration, impact on technology direction, and delivering high-performance ASICs for next-generation instrumentation platforms. Hybrid work with at least 2 days in-office.

Qualifications

• Bachelor’s degree or equivalent practical experience in a technical discipline.
• Significant experience developing ASICs or complex digital ICs including design and physical implementation.
• Experience leading technical projects and mentoring engineers.
• Strong understanding of digital design methodologies and timing analysis.
• Experience with physical design flow including floorplanning and place-and-route.
• Familiarity with ASIC verification, DFT, packaging and silicon validation.
• Proficient with industry-standard ASIC tools from Cadence, Synopsys, or Siemens EDA.
• Experience supporting ASIC milestones such as tapeout, qualification, or production.

Responsibilities

• Lead the digital ASIC design and realization organization.
• Oversee end-to-end ASIC flow: architecture, RTL, IP integration, physical design, signoff, tapeout, bring-up.
• Mentor engineers and coordinate work across multidisciplinary teams.
• Influence technology direction, engineering methodology, and program execution.
• Deliver ASIC solutions enabling next-gen test and measurement innovations.

Skills

ASIC development

Digital design

Leadership mentoring

SystemVerilog RTL

Physical design

Timing closure

Verification/DFT

CADENCE/Synopsys tools

Cross-functional collaboration

FPGA experience

Education

Bachelor's degree in Electrical/Computer Engineering or related

Tools

Cadence tools

Synopsys tools

Siemens EDA tools

Job description

Job Title: ASIC Design ManagerJob Description

We are seeking an ASIC Design Manager to lead and grow our digital ASIC design and realization organization. ASICs are at the core of next-generation instrumentation platforms, and this role involves overseeing the execution of the complete ASIC flow, from architecture and RTL development through IP integration, physical design, signoff, tapeout, and silicon bring-up.

Responsibilities

• Lead the digital ASIC design and realization organization.

• Oversee execution across the complete ASIC flow, including architecture, RTL development, IP integration, physical design, signoff, tapeout, and silicon bring-up.

• Mentor engineers and coordinate work across multidisciplinary engineering teams.

• Influence technology direction, engineering methodology, and program execution.

• Deliver ASIC solutions that enable the next generation of test and measurement innovation.

Essential Skills

• Bachelors degree in Electrical Engineering, Computer Engineering, a related technical discipline, or equivalent practical experience.

• Significant experience in developing ASICs or complex digital integrated circuits, including digital design and physical implementation.

• Experience leading technical projects and mentoring engineers.

• Strong understanding of digital design methodologies, including microarchitecture, synthesizable SystemVerilog or Verilog RTL, IP integration, synthesis, constraints development, and static timing analysis.

• Experience with physical design and implementation, including floor-planning, power planning, clock-tree synthesis, place-and-route, timing closure, engineering change orders, power integrity, or physical signoff.

• Familiarity with ASIC verification, DFT, packaging, CAD, and silicon validation interfaces and handoffs.

• Experience using industry-standard ASIC design, implementation, timing, or signoff tools from Cadence, Synopsys, Siemens EDA, or equivalent providers.

• Experience supporting an ASIC through major development milestones such as design closure, tapeout, silicon bring-up, qualification, or production.

Additional Skills & Qualifications

• Strong communication, collaboration, organizational, and problem-solving skills.

• Ability to work effectively across engineering, product, and program-management teams.

• Experience with FPGA.

Work Environment

This role requires at least 2 days in the office, providing the opportunity to collaborate directly with a talented engineering team responsible for strategic silicon development.

Job Type & Location

This is a Permanent position based out of Littleton, CO.

Pay and Benefits

The pay range for this position is $175000.00 - $276500.00/yr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Tektronix, a wholly owned subsidiary of Ralliant Corporation, is a place where people are challenged to explore the boundaries of whats possible, bringing the digital future one step closer every day. Through precision-engineered measurement solutions, we work with our customers to eliminate the barriers between inspiration and realization of world-changing technologies. We believe that cultivating a deeper sense of loyalty and belonging is key to how we attract and retain our best people. This reality inspires our Inclusion & Diversity vision, We Are More Together, and guides our approach as we all work toward creating great places where our teams work and thrive. Realize your true potential at Tektronix join us in revolutionizing a better tomorrow!

Job Type & Location

This is a Permanent position based out of Littleton, CO.

Application Deadline

This position is anticipated to close on Nov 3, 2026.

Workplace Type

This is a hybrid position in Littleton,CO.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email [e-mail] for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.