ASIC Clocking Verification Engineer (Hybrid) | Equity

NVIDIA Corporation; Santa Clara, Northern (CA, KY); Hybrid; USD 116,000 - 219,000; Full time

Benefits offered by this job

Equity

Benefits

Hybrid work

Job summary

NVIDIA Corporation is seeking an experienced ASIC Design Verification engineer for its Clocks team in California. You will own validation of clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, and coverage metrics.

You'll code in SystemVerilog, UVM, C++, Perl, and Python, collaborate with clocks architecture and design teams, and coordinate across time zones. This role offers a hybrid work model and competitive equity/benefits.

Qualifications

• BS or MS in EE/ECE or equivalent experience.
• Proven design verification experience: 3+ years.
• Expertise in SV/UVM, constraint random verification, coverage metrics.

Responsibilities

• Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.
• Tackle sophisticated problems and develop scalable solutions across platforms.
• Hands on with industry-standard verification methodologies and tools.
• Code in System Verilog, UVM, C++, Perl and Python; work with NVIDIA custom compilers and tools.
• Collaborate with clocks architecture and design teams to validate clocks designs.
• Coordinate with internal and external teams across time zones.

Skills

SystemVerilog/UVM

C++

Python

Perl

Test plans

Coverage metrics

Formal verification

Education

BS or MS in EE/ECE

Tools

NVIDIA tools

Job description

NVIDIA Corporation is seeking an experienced ASIC Design Verification engineer for its Clocks team in California. You will own validation of clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, and coverage metrics.

You'll code in SystemVerilog, UVM, C++, Perl, and Python, collaborate with clocks architecture and design teams, and coordinate across time zones. This role offers a hybrid work model and competitive equity/benefits.