AI Silicon Implementation Lead (TPU & SoC)

Google; Sunnyvale (CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google is seeking an Implementation Technical Lead to shape the future of AI/ML hardware acceleration through TPU technology and custom silicon development. You will bridge physical design, packaging, DFT, and technology teams to ensure converge on PPA, thermal, and reliability from architecture to tape‑out.

You will coordinate technical directions for internal teams and external partners, maintaining high-quality delivery on ambitious project timelines while advancing the state of the art in

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience with silicon implementation with a focus on high-performance SoC or ASIC development.
• Experience leading cross-functional teams (physical design (PD), package, power, and design for testing through the tape-out cycle, from architecture to GDSII).
• Experience managing technical relationships with external vendors, ASIC partners, or foundries.
• Experience with Customer Owned Tooling (COT) design models and the specific tests they present compared to traditional ASIC flows.

Responsibilities

• Drive technical decisions and synchronization across all implementation domains (physical design, package, power, Signal Integrity and Power Integrity (SI/PI), and DFT, resolving complex cross‑functional issues that impact chip delivery.
• Own the physical implementation of the entire chip, ensuring the final packaged silicon meets all performance, power, area, thermal, yield, and reliability goals.
• Identify critical blocking issues and implementation risks early, develop and execute mitigation strategies to protect the program schedule and quality.
• Manage technical interactions with ASIC partners and external vendors to ensure their deliverables align strictly with chip requirements and milestones.
• Define the framework for implementation execution, including setting technical directions, establishing milestone criteria, and innovation in methodologies.

Skills

Silicon implementation

Cross-functional leadership

Vendor management

COT design models

Risk assessment & mitigation

Roadmapping

Executive risk communication

Process nodes & packaging

First-pass silicon achievement

Education

Bachelor's degree in EE/CE/CS or equivalent

Master's or PhD in EE/CE/CS (computer architecture)

Job description

Google is seeking an Implementation Technical Lead to shape the future of AI/ML hardware acceleration through TPU technology and custom silicon development. You will bridge physical design, packaging, DFT, and technology teams to ensure converge on PPA, thermal, and reliability from architecture to tape‑out.

You will coordinate technical directions for internal teams and external partners, maintaining high-quality delivery on ambitious project timelines while advancing the state of the art in