AI/ML ASIC Verification Engineer — TPU Acceleration

Google; Sunnyvale (CA); On-site; USD 138,000 - 198,000; Full time

Job summary

Google is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You will drive cutting-edge TPU technology powering Google's demanding AI/ML applications and verify complex digital designs with a focus on TPU architecture integrated into AI/ML-driven systems.

You will join a team developing cutting-edge ASICs used to accelerate computation in data centers, contributing to architecture, documentation, and verification for next-generation data center

Qualifications

• Bachelor's degree or equivalent practical experience in EE/CS.
• 4 years of experience with design verification.
• Experience verifying digital logic at RTL using SystemVerilog/UVM for ASICs.
• Master's degree or PhD in EE/CE/CS with focus on computer architecture.
• 6 years of experience with industry standard tools, languages and methodologies for silicon-based ICs.
• Experience with 3+ SoC projects.
• Strong problem-solving and teamwork skills.

Responsibilities

• Plan verification of complex digital design blocks by understanding specs and coordinating with design engineers to identify key verification scenarios.
• Create a constrained-random verification environment using SystemVerilog and UVM.
• Identify and write coverage measures for stimulus and corner cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to show progress toward tape-out.

Skills

Design verification

SystemVerilog

UVM

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with emphasis on computer architecture

Job description

Google is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You will drive cutting-edge TPU technology powering Google's demanding AI/ML applications and verify complex digital designs with a focus on TPU architecture integrated into AI/ML-driven systems.

You will join a team developing cutting-edge ASICs used to accelerate computation in data centers, contributing to architecture, documentation, and verification for next-generation data center