ASIC Formal Verification Engineer – TPU AI Accelerators

Google; Sunnyvale (CA); On-site; USD 138,000 - 197,000; Full time

Benefits offered by this job

Equity

Bonus target

Benefits

Job summary

Google seeks an ASIC Formal Verification Engineer to shape TPU architecture and its integration into AI/ML-driven systems.

You will verify complex digital designs, focusing on data-center accelerators and contributing to architecture, documentation, and verification of next-gen TPUs. Strong emphasis on formal verification strategies and reusable components.

This role offers collaboration across teams, with scale and impact across Google's AI infrastructure and cloud platforms.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience with formal and design verification.
• Experience with SystemVerilog or Verilog.
• Experience with one or more formal verification tools (e.g., Jasper, VC Formal, Questa Formal, 360-DV).

Responsibilities

• Plan the formal verification strategy, create the properties and constraints for the digital design blocks.
• Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
• Resolve difficult to verify properties.
• Contribute improvements to methodologies to enhance formal verification results.
• Architect and implement reusable formal verification components.

Skills

Formal verification

SystemVerilog/Verilog

Formal verification tools

Communication

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's degree or PhD (preferred)

Tools

Jasper

VC Formal

Questa Formal

360-DV

Job description

Google seeks an ASIC Formal Verification Engineer to shape TPU architecture and its integration into AI/ML-driven systems.

You will verify complex digital designs, focusing on data-center accelerators and contributing to architecture, documentation, and verification of next-gen TPUs. Strong emphasis on formal verification strategies and reusable components.

This role offers collaboration across teams, with scale and impact across Google's AI infrastructure and cloud platforms.