AI Memory Systems Architect (HBM) – Research Engineer

Micron Technology, Inc; Richardson (TX); On-site; USD 100,000 - 140,000; Full time

Job summary

Micron Technology, Inc. seeks an AI Infrastructure & HBM Architecture Engineer to explore next‑generation AI memory and system environments in Richardson, TX.

You will analyze how AI workloads influence memory system design and participate in performance modeling and tool development. The role involves collecting data for bandwidth/latency analysis, building simple performance models, and developing simulation frameworks while collaborating with senior engineers across DTPCO, Design, and

Qualifications

• Pursuing a Master’s degree or PhD in EE, CE, CS or related field.
• Strong understanding of computer architecture and hardware/software interaction.
• Programming experience in Python, C/C++ or similar languages.

Responsibilities

• Researching emerging trends in compute, networking, and storage for future AI workloads.
• Supporting HBM architecture analysis by collecting data on bandwidth and latency.
• Developing or refining simulation frameworks to model AI cluster performance.
• Building first-order models for HBM bandwidth, latency, and memory hierarchy trade-offs.
• Creating trend dashboards using CSP benchmarks and industry datasets.
• Collaborating with DTPCO mentors to explore architectural intercept opportunities.

Skills

Python

C/C++

Computer architecture

Hardware/software interaction

Education

Master’s or PhD in Electrical Engineering, Computer Engineering, or Computer Science

Job description

Micron Technology, Inc. seeks an AI Infrastructure & HBM Architecture Engineer to explore next‑generation AI memory and system environments in Richardson, TX.

You will analyze how AI workloads influence memory system design and participate in performance modeling and tool development. The role involves collecting data for bandwidth/latency analysis, building simple performance models, and developing simulation frameworks while collaborating with senior engineers across DTPCO, Design, and