AI Memory Systems Engineer (HBM & Infrastructure)

1000 Micron Technology, Inc.; Richardson (TX); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical plans

Dental plans

Vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. is seeking an AI Infrastructure & HBM Architecture Engineer to explore next-generation AI memory and system environments. You will analyze infrastructure trends, contribute to performance modeling, and support tool development informing HBM decisions.

The role involves working with senior engineers across DTPCO, Design, and Product/System teams, gaining hands-on exposure to AI workloads’ impact on memory system design.

Qualifications

• Pursuing a Master’s degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• Strong foundational understanding of computer architecture, digital systems, and hardware/software interaction.
• Interest in memory subsystem design (HBM, DDR, caches) and AI/ML workloads.
• Deep understanding of LLM pipeline and critical bottlenecks.
• Programming experience in Python, C/C++, or similar languages.

Responsibilities

• Research emerging trends in compute, networking, and storage infrastructure for future AI workloads.
• Support HBM architecture analysis by collecting and synthesizing data on bandwidth, latency, and memory requirements.
• Help develop or refine simulation frameworks to model AI cluster performance and memory subsystem behavior.
• Assist in building first-order performance models for HBM bandwidth, latency, GPU/CPU interactions, and memory hierarchy trade-offs.
• Participate in building trend dashboards using CSP benchmarks and industry datasets.
• Collaborate with mentors to explore architectural intercept opportunities for next-gen AI systems.

Skills

Python

C/C++

Computer architecture

LLM bottlenecks

Education

Master's or PhD in EE/CE/CS

Job description

Micron Technology, Inc. is seeking an AI Infrastructure & HBM Architecture Engineer to explore next-generation AI memory and system environments. You will analyze infrastructure trends, contribute to performance modeling, and support tool development informing HBM decisions.

The role involves working with senior engineers across DTPCO, Design, and Product/System teams, gaining hands-on exposure to AI workloads’ impact on memory system design.