Advanced UVM Digital Verification Engineer (FPGA/ASIC)

Draper Labs; Cambridge (MA); On-site; USD 75,000 - 156,000; Full time

Benefits offered by this job

Workplace flexibility

Employee clubs (e.g., photography, yoga)

Health and finance workshops

Discounts to local museums and cultural activities

Job summary

A leading nonprofit research and development company in Cambridge is seeking a motivated UVM Digital Verification Engineer to tackle unique verification challenges in FPGAs and ASICs. This role involves applying modern verification strategies to complex designs, collaborating in multidisciplinary teams, and optimizing hardware for performance and efficiency. Candidates should possess a strong background in integrated circuit design and relevant experience in UVM environments. Join us at Draper Labs to contribute to significant national challenges and partake in a culture that inspires innovation.

Qualifications

• 3-5 years of experience with a bachelor's degree in Integrated Circuits or ASIC Hardware Engineering.
• 0-2 years of experience with a master's degree in a related field.
• Experience with formal analysis and constrained-random testing.

Responsibilities

• Design and simulate circuits at transistor-level.
• Contribute to system-level design and complex chip architectures.
• Develop verification and test plans for UVM environments.

Skills

Proficiency in integrated circuit design

Understanding of integrated circuits, semiconductors, and general computer architecture

Excellent verbal and written communication skills

Strong analytical and problem-solving skills

Ability to prioritize tasks

Excellent time management skills

Education

Bachelor's degree in Engineering or related field

Master's degree preferred

Tools

System Verilog

UVM/UVMF

Python

Linux environment

Job description

A leading nonprofit research and development company in Cambridge is seeking a motivated UVM Digital Verification Engineer to tackle unique verification challenges in FPGAs and ASICs. This role involves applying modern verification strategies to complex designs, collaborating in multidisciplinary teams, and optimizing hardware for performance and efficiency. Candidates should possess a strong background in integrated circuit design and relevant experience in UVM environments. Join us at Draper Labs to contribute to significant national challenges and partake in a culture that inspires innovation.