Senior / Staff Physical Verification CAD Engineer

PERSOL Singapore

Singapore

Presencial

SGD 85 000 - 125 000

Tempo integral

Há 4 dias
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Resumo da oferta

PERSOL Singapore is seeking an engineer to join the IC design verification team. You will work with the PDK group to code and maintain DRC, LVS, ANT, ERC, LPE, and ESD rule decks for multiple processes, and you will help develop layout and physical verification flows.

You will collaborate with QA to reduce defects in PDKs and rule decks, perform full-chip physical verification, and implement automation scripts using C-shell, Python, and Perl.

Qualificações

  • Bachelor/Master's degree in Electrical/Electronics Engineering or Computer Science.
  • Familiarity with IC design front-to-backend flow.
  • Hands-on experience with interposer design, TSV technology and 2.5D/3D IC stacking (CoWoS/EMIB) is a must.
  • Proficiency in scripting languages (Tcl, Python, Perl) and UNIX/Linux environments.

Responsabilidades

  • Code and maintain DRC/LVS/ANT/ERC/LPE/ESD rule decks for multiple processes.
  • Develop layout implementation and physical verification flows.
  • Collaborate with QA to reduce PDK and rule deck defects.
  • Perform full-chip physical verification and debugging of DRC/LVS/ERC.
  • Implement automation scripts in shell, Python and Perl.

Conhecimentos

Electrical Engineering
IC Design
Scripting
UNIX/Linux
Communication
Problem Solving

Formação académica

Bachelor/Master's Degree in Electrical/Electronics/CS

Ferramentas

Calibre
ICV

Descrição da oferta de emprego

Job Description:

Co-work with PDK team to code and maintain DRC / LVS / ANT / ERC / LPE / ESD rule deck for various processes

Develop layout implementation flow and physical verification flow

Co-work with QA team to reduce the PDKs/Rule deck defect

Perform full-chip physical verification such as debugging DRC / LVS / ERC

Implement automation scripts in C-shell, Python and Perl

Job Requirements:
  • Bachelor / Master's Degree in Electrical / Electronics Engineering / Computer Science
  • Familiar with IC Design front-to-backend flow
  • Familiar with interposer design, TSV technology and chip stacking techniques such as CoWoS or EMIB with 2.5D and 3D ICs experiences. (Must have)
  • Preferably well-versed in Calibre, ICV
  • Proficient in script programming, such as, Tcl, Perl or C-shell
  • Proficient in UNIX (Linux) platforms
  • Strong communication skills, problem solving and analytical skills
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