3D IC Physical Verification & DRC/LVS Automation Engineer

PERSOL

Singapore

Vor Ort

SGD 70.000 - 110.000

Vollzeit

Vor 4 Tagen
Sei unter den ersten Bewerbenden

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Zusammenfassung

PERSOL is seeking an experienced IC Design Verification Engineer in Singapore to join our team and work on DRC, LVS, ERC, LPE and ESD rule decks for multiple processes. You will develop layout implementation and physical verification flows, collaborating with QA to reduce PDK defects and performing full-chip verification.

Strong scripting skills (Tcl/Perl/C-shell) and UNIX/Linux proficiency are essential. The role emphasizes collaboration with PDK teams, automation, and hands-on debugging, with

Qualifikationen

  • Bachelor / Master’s Degree in Electrical / Electronics Engineering / Computer Science
  • Familiar with IC Design front-to-backend flow
  • Familiar with interposer design, TSV technology and chip stacking techniques such as CoWoS or EMIB with 2.5D and 3D ICs experiences. (Must have)
  • Preferably well-versed in Calibre, ICV
  • Proficient in script programming, such as, Tcl, Perl or C-shell
  • Proficient in UNIX (Linux) platforms
  • Strong communication skills, problem solving and analytical skills

Aufgaben

  • Co-work with PDK team to code and maintain DRC / LVS / ANT / ERC / LPE / ESD rule deck for various processes
  • Develop layout implementation flow and physical verification flow
  • Co-work with QA team to reduce the PDKs/Rule deck defect
  • Perform full-chip physical verification such as debugging DRC / LVS / ERC
  • Implement automation scripts in C-shell, Python and Perl

Kenntnisse

IC Design front-to-backend flow
Interposer design
TSV technology
2.5D/3D IC stacking (CoWoS/EMIB)
Communication
Problem solving
Analytical skills
Unix/Linux
Tcl
Perl
C-shell
Python
Calibre
ICV

Ausbildung

Bachelor / Master’s Degree in Electrical / Electronics Engineering / Computer Science

Tools

Calibre
ICV

Jobbeschreibung

PERSOL is seeking an experienced IC Design Verification Engineer in Singapore to join our team and work on DRC, LVS, ERC, LPE and ESD rule decks for multiple processes. You will develop layout implementation and physical verification flows, collaborating with QA to reduce PDK defects and performing full-chip verification.

Strong scripting skills (Tcl/Perl/C-shell) and UNIX/Linux proficiency are essential. The role emphasizes collaboration with PDK teams, automation, and hands-on debugging, with

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