Engineer/Staff Engineer – Chip Physical Verification CAD

Mediatek Singapore Pte Ltd; Singapore; On-site; SGD 90,000 - 150,000; Full time

Job summary

MediaTek Singapore Pte Ltd is seeking a motivated Physical Verification engineer to define and deliver sign-off flows for advanced SoC design. You will collaborate with PDK, DFM, MF and Designers to code and maintain DRC/LVS/ANT/DMY/ERC rule decks across processes and develop robust layout and PV flows.

You will also work with QA to reduce defects, perform full-chip PV debugging, and implement automation in Tcl, Perl or C-shell while exploring AI techniques to boost productivity in rule-deck

Qualifications

• Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science
• Familiar with IC Design front-to-backend flow
• Preferably well-versed in Calibre, ICV
• Proficient in script programming, such as, Tcl, Perl or C-shell
• Proficient in UNIX (Linux) platforms
• Experience or strong interest in applying AI or LLM-based tools to EDA/CAD automation (e.g., AI-assisted coding, intelligent rule-deck debugging, anomaly detection in verification data) is a plus
• Strong communication skills, problem solving and analytical skills

Responsibilities

• Co-work with various teams (PDK, DFM, MF, Designers) to code and maintain DRC/LVS/ANT/DMY/ERC/LPE/ESD rule deck for various processes
• Develop layout implementation flow and physical verification flow
• Co-work with QA team to reduce the PDKs/Rule deck defects
• Perform full-chip physical verification such as debugging DRC/LVS/ERC
• Implement automation scripts in C-shell, Python and Perl
• Explore and apply AI techniques (e.g., LLM-assisted script generation) to improve DRC/LVS/ERC rule deck development, defect triage, and overall physical verification productivity

Skills

Electrical/Electronics engineering

Python scripting

Tcl scripting

Perl scripting

C-shell scripting

Strong communication

Analytical skills

Education

Bachelor's or Master's in Electrical/Electronics Engineering / Computer Science

Tools

Calibre

ICV

UNIX/Linux

Job description

Job Description

The MediaTek Physical Verification team is seeking a qualified candidate to help define and deliver physical sign-off flows and solutions for SoC design, with a focus on enabling technology at advanced process nodes. What you will do:

• Co-work with various teams (PDK, DFM, MF, Designers) to code and maintain DRC/LVS/ANT/DMY/ERC/LPE/ESD rule deck for various processes


• Develop layout implementation flow and physical verification flow


• Co-work with QA team to reduce the PDKs/Rule deck defects


• Perform full-chip physical verification such as debugging DRC/LVS/ERC


• Implement automation scripts in C-shell, Python and Perl


• Explore and apply AI techniques (e.g., LLM-assisted script generation) to improve DRC/LVS/ERC rule deck development, defect triage, and overall physical verification productivity

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Main Requirements and Qualifications

1. What you will bring:


2. Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science


3. Familiar with IC Design front-to-backend flow


4. Preferably well-versed in Calibre, ICV


5. Proficient in script programming, such as, Tcl, Perl or C-shell


6. Proficient in UNIX (Linux) platforms


7. Experience or strong interest in applying AI or LLM-based tools to EDA/CAD automation (e.g., AI-assisted coding, intelligent rule-deck debugging, anomaly detection in verification data) is a plus


8. Strong communication skills, problem solving and analytical skills