Physical Verification Sign-off Engineer

Mediatek Singapore Pte Ltd

Singapore

On-site

SGD 100,000 - 140,000

Full time

14 days+

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Job summary

Mediatek Singapore Pte Ltd is seeking an IC Verification Engineer responsible for full-chip physical verification sign-off (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. You will collaborate with Place & Route and IP owners to ensure layout integrity and coordinate with Manufacturing on DRC issues.

The role requires strong scripting (Tcl/Perl/C-shell), UNIX/Linux proficiency, and excellent communication, problem-solving, and analytical skills.

Qualifications

  • Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science
  • Familiar with IC Design front-to-backend flow
  • Preferably well-versed in Calibre, Assura, Star-RCXT
  • Proficient in script programming, such as, Tcl, Perl or C-shell
  • Proficient in UNIX (Linux) platforms
  • Strong communication skills, problem solving and analytical skills

Responsibilities

  • Full-chip Physical Verification Sign-off in the area of DRC, LVS, ANT, ERC, ESD, PERC for tape-out
  • Place & Route team to resolve full-chip layout integration issues
  • Coordinates with internal IP owners on IP related issues
  • Coordinates with Manufacturing Team on DRC related issues
  • Provide automation solutions to improve efficiency in tape-out flow
  • Report on tapeout issues

Skills

Strong communication
Problem solving
Analytical skills
UNIX/Linux proficiency

Education

Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science

Tools

Calibre
Assura
Star-RCXT
Tcl
Perl
C-shell

Job description

Job Description
  • Responsible for Full-chip Physical Verification Sign-off in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.
  • Co-work with

Place & Route team to resolve full-chip layout integration issues.

  • Coordinates with internal IP owners on IP related issues.
  • Coordinates with Manufacturing Team on DRC related issues.
  • Provide automation solutions to improve efficiency in tape-out flow.
  • Report on tapeout issues

#LI-WC1

Main Requirements and Qualifications
  1. Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science
  2. Familiar with IC Design front-to-backend flow
  3. Preferably well-versed in Calibre, Assura, Star-RCXT
  4. Proficient in script programming, such as, Tcl, Perl or C-shell
  5. Proficient in UNIX (Linux) platforms
  6. Strong communication skills, problem solving and analytical skills
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