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PERSOL Singapore seeks a Full-chip Physical Verification engineer to sign off on tape-out in DRC, LVS, ANT, ERC, ESD and PERC. You will collaborate with the Place & Route team to resolve layout integration issues and coordinate with IP owners and the manufacturing team.
The role emphasizes automation to improve tape-out flow, issue reporting, and strong problem-solving and communication skills. A degree in E/EE or CS and UNIX/Linux proficiency are required.