Staff Engineer/ Technical Manager, Physical Verification CAD

PERSOL; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

PERSOL is seeking an experienced IC Design Verification/Physical Design professional in Singapore. The role focuses on co-working with the PDK team to code and maintain rule decks, develop flow for layout implementation, and perform full-chip physical verification.

Qualified candidates have a Bachelor or Master’s in electrical/electronics engineering or computer science, 8+ years in IC design, and strong scripting skills (Tcl, Perl, C-shell) with UNIX/Linux expertise.

Qualifications

• Bachelor or Master’s degree in Electrical/Electronics Engineering or Computer Science.
• 8+ years of relevant experience in the IC design industry.
• Familiar with IC design backend flows and layout verification tools.
• Experience with CoWoS or EMIB 2.5D/3D IC integration is required.
• Proficiency in scripting languages (Tcl, Perl, C-shell) and UNIX/Linux.
• Knowledge of Calibre and ICV is preferred.

Responsibilities

• Code and maintain DRC/ LVS / ANT / ERC / LPE / ESD rule decks for various processes.
• Develop layout implementation flow and physical verification flow.
• Collaborate with QA to reduce PDKs/Rule deck defects.
• Perform full-chip physical verification and debugging of DRC/LVS/ERC.
• Implement automation scripts in Tcl, Perl, and C-shell.

Skills

Strong communication

Problem solving

Analytical skills

Education

Bachelor/Master’s Degree in Electrical / Electronics Engineering / Computer Science

Tools

Calibre

ICV

Tcl

Perl

C-shell

UNIX/Linux

Job description

Job Description

• Co-work with PDK team to code and maintain DRC / LVS / ANT / ERC / LPE / ESD rule deck for various processes
• Develop layout implementation flow and physical verification flow
• Co-work with QA team to reduce the PDKs/Rule deck defect
• Perform full-chip physical verification such as debugging DRC / LVS / ERC
• Implement automation scripts in C-shell, Python and Perl

Job Requirements

• Bachelor/Master’s Degree in Electrical / Electronics Engineering / Computer Science
• With a min. 8 years of relevant experience in IC Design Industry
• Familiar with IC Design front-to-backend flow
• Familiar with interposer design, TSV technology and chip stacking techniques such as
• CoWoS or EMIB with 2.5D and 3D ICs experiences. (Must have)
• Preferably well-versed in Calibre, ICV
• Proficient in script programming, such as, Tcl, Perl or C-shell
• Proficient in UNIX (Linux) platforms
• Strong communication skills, problem solving and analytical skills