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Job summary
A leading tech company in Singapore seeks an experienced STA Engineer to perform detailed timing analysis on digital designs for networking and audio solutions. The role requires a Bachelor’s or Master’s degree in Electrical Engineering and over 6 years of relevant experience. Candidates should be proficient in STA tools like Synopsys PrimeTime and have strong scripting skills in TCL, Perl, or Python. Ideal candidates will have knowledge of digital design principles and CMOS technology, focusing on high-performance applications.
Qualifications
6+ years of experience in STA for digital ICs.
Experience with timing analysis for designs at 28nm and below.
Familiarity with low-power design techniques and their impact on timing.
Responsibilities
Perform detailed STA on digital designs used in networking and audio solutions.
Identify and resolve timing violations in critical paths.
Conduct multi-mode, multi-corner analysis to ensure timing closure.
Skills
Strong understanding of digital design principles
Scripting skills (TCL, Perl, Python)
Excellent communication skills
Problem-solving skills
Education
Bachelor’s or Master’s degree in Electrical Engineering
Tools
Synopsys PrimeTime
Cadence Tempus
Job description
A leading tech company in Singapore seeks an experienced STA Engineer to perform detailed timing analysis on digital designs for networking and audio solutions. The role requires a Bachelor’s or Master’s degree in Electrical Engineering and over 6 years of relevant experience. Candidates should be proficient in STA tools like Synopsys PrimeTime and have strong scripting skills in TCL, Perl, or Python. Ideal candidates will have knowledge of digital design principles and CMOS technology, focusing on high-performance applications.